esp32s2/efuse/
wr_tim_conf0.rs

1#[doc = "Register `WR_TIM_CONF0` reader"]
2pub type R = crate::R<WR_TIM_CONF0_SPEC>;
3#[doc = "Register `WR_TIM_CONF0` writer"]
4pub type W = crate::W<WR_TIM_CONF0_SPEC>;
5#[doc = "Field `THP_A` reader - Configures the hold time of programming operation."]
6pub type THP_A_R = crate::FieldReader;
7#[doc = "Field `THP_A` writer - Configures the hold time of programming operation."]
8pub type THP_A_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `TPGM_INACTIVE` reader - Configures the length of pulse during programming 0 to eFuse."]
10pub type TPGM_INACTIVE_R = crate::FieldReader;
11#[doc = "Field `TPGM_INACTIVE` writer - Configures the length of pulse during programming 0 to eFuse."]
12pub type TPGM_INACTIVE_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13#[doc = "Field `TPGM` reader - Configures the length of pulse during programming 1 to eFuse."]
14pub type TPGM_R = crate::FieldReader<u16>;
15#[doc = "Field `TPGM` writer - Configures the length of pulse during programming 1 to eFuse."]
16pub type TPGM_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
17impl R {
18    #[doc = "Bits 0:7 - Configures the hold time of programming operation."]
19    #[inline(always)]
20    pub fn thp_a(&self) -> THP_A_R {
21        THP_A_R::new((self.bits & 0xff) as u8)
22    }
23    #[doc = "Bits 8:15 - Configures the length of pulse during programming 0 to eFuse."]
24    #[inline(always)]
25    pub fn tpgm_inactive(&self) -> TPGM_INACTIVE_R {
26        TPGM_INACTIVE_R::new(((self.bits >> 8) & 0xff) as u8)
27    }
28    #[doc = "Bits 16:31 - Configures the length of pulse during programming 1 to eFuse."]
29    #[inline(always)]
30    pub fn tpgm(&self) -> TPGM_R {
31        TPGM_R::new(((self.bits >> 16) & 0xffff) as u16)
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37        f.debug_struct("WR_TIM_CONF0")
38            .field("thp_a", &self.thp_a())
39            .field("tpgm_inactive", &self.tpgm_inactive())
40            .field("tpgm", &self.tpgm())
41            .finish()
42    }
43}
44impl W {
45    #[doc = "Bits 0:7 - Configures the hold time of programming operation."]
46    #[inline(always)]
47    pub fn thp_a(&mut self) -> THP_A_W<WR_TIM_CONF0_SPEC> {
48        THP_A_W::new(self, 0)
49    }
50    #[doc = "Bits 8:15 - Configures the length of pulse during programming 0 to eFuse."]
51    #[inline(always)]
52    pub fn tpgm_inactive(&mut self) -> TPGM_INACTIVE_W<WR_TIM_CONF0_SPEC> {
53        TPGM_INACTIVE_W::new(self, 8)
54    }
55    #[doc = "Bits 16:31 - Configures the length of pulse during programming 1 to eFuse."]
56    #[inline(always)]
57    pub fn tpgm(&mut self) -> TPGM_W<WR_TIM_CONF0_SPEC> {
58        TPGM_W::new(self, 16)
59    }
60}
61#[doc = "Configuration register 0 of eFuse programming timing parameters.\n\nYou can [`read`](crate::Reg::read) this register and get [`wr_tim_conf0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wr_tim_conf0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
62pub struct WR_TIM_CONF0_SPEC;
63impl crate::RegisterSpec for WR_TIM_CONF0_SPEC {
64    type Ux = u32;
65}
66#[doc = "`read()` method returns [`wr_tim_conf0::R`](R) reader structure"]
67impl crate::Readable for WR_TIM_CONF0_SPEC {}
68#[doc = "`write(|w| ..)` method takes [`wr_tim_conf0::W`](W) writer structure"]
69impl crate::Writable for WR_TIM_CONF0_SPEC {
70    type Safety = crate::Unsafe;
71}
72#[doc = "`reset()` method sets WR_TIM_CONF0 to value 0x00c8_0101"]
73impl crate::Resettable for WR_TIM_CONF0_SPEC {
74    const RESET_VALUE: u32 = 0x00c8_0101;
75}
esp32s2/efuse/wr_tim_conf0.rs

esp32s2/efuse/
wr_tim_conf0.rs
