1#[doc = "Register `DTHRCTL` reader"]
2pub type R = crate::R<DTHRCTL_SPEC>;
3#[doc = "Register `DTHRCTL` writer"]
4pub type W = crate::W<DTHRCTL_SPEC>;
5#[doc = "Field `NONISOTHREN` reader - "]
6pub type NONISOTHREN_R = crate::BitReader;
7#[doc = "Field `NONISOTHREN` writer - "]
8pub type NONISOTHREN_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `ISOTHREN` reader - "]
10pub type ISOTHREN_R = crate::BitReader;
11#[doc = "Field `ISOTHREN` writer - "]
12pub type ISOTHREN_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `TXTHRLEN` reader - "]
14pub type TXTHRLEN_R = crate::FieldReader<u16>;
15#[doc = "Field `TXTHRLEN` writer - "]
16pub type TXTHRLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
17#[doc = "Field `AHBTHRRATIO` reader - "]
18pub type AHBTHRRATIO_R = crate::FieldReader;
19#[doc = "Field `AHBTHRRATIO` writer - "]
20pub type AHBTHRRATIO_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
21#[doc = "Field `RXTHREN` reader - "]
22pub type RXTHREN_R = crate::BitReader;
23#[doc = "Field `RXTHREN` writer - "]
24pub type RXTHREN_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `RXTHRLEN` reader - "]
26pub type RXTHRLEN_R = crate::FieldReader<u16>;
27#[doc = "Field `RXTHRLEN` writer - "]
28pub type RXTHRLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
29#[doc = "Field `ARBPRKEN` reader - "]
30pub type ARBPRKEN_R = crate::BitReader;
31#[doc = "Field `ARBPRKEN` writer - "]
32pub type ARBPRKEN_W<'a, REG> = crate::BitWriter<'a, REG>;
33impl R {
34 #[doc = "Bit 0"]
35 #[inline(always)]
36 pub fn nonisothren(&self) -> NONISOTHREN_R {
37 NONISOTHREN_R::new((self.bits & 1) != 0)
38 }
39 #[doc = "Bit 1"]
40 #[inline(always)]
41 pub fn isothren(&self) -> ISOTHREN_R {
42 ISOTHREN_R::new(((self.bits >> 1) & 1) != 0)
43 }
44 #[doc = "Bits 2:10"]
45 #[inline(always)]
46 pub fn txthrlen(&self) -> TXTHRLEN_R {
47 TXTHRLEN_R::new(((self.bits >> 2) & 0x01ff) as u16)
48 }
49 #[doc = "Bits 11:12"]
50 #[inline(always)]
51 pub fn ahbthrratio(&self) -> AHBTHRRATIO_R {
52 AHBTHRRATIO_R::new(((self.bits >> 11) & 3) as u8)
53 }
54 #[doc = "Bit 16"]
55 #[inline(always)]
56 pub fn rxthren(&self) -> RXTHREN_R {
57 RXTHREN_R::new(((self.bits >> 16) & 1) != 0)
58 }
59 #[doc = "Bits 17:25"]
60 #[inline(always)]
61 pub fn rxthrlen(&self) -> RXTHRLEN_R {
62 RXTHRLEN_R::new(((self.bits >> 17) & 0x01ff) as u16)
63 }
64 #[doc = "Bit 27"]
65 #[inline(always)]
66 pub fn arbprken(&self) -> ARBPRKEN_R {
67 ARBPRKEN_R::new(((self.bits >> 27) & 1) != 0)
68 }
69}
70#[cfg(feature = "impl-register-debug")]
71impl core::fmt::Debug for R {
72 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
73 f.debug_struct("DTHRCTL")
74 .field("nonisothren", &self.nonisothren())
75 .field("isothren", &self.isothren())
76 .field("txthrlen", &self.txthrlen())
77 .field("ahbthrratio", &self.ahbthrratio())
78 .field("rxthren", &self.rxthren())
79 .field("rxthrlen", &self.rxthrlen())
80 .field("arbprken", &self.arbprken())
81 .finish()
82 }
83}
84impl W {
85 #[doc = "Bit 0"]
86 #[inline(always)]
87 pub fn nonisothren(&mut self) -> NONISOTHREN_W<DTHRCTL_SPEC> {
88 NONISOTHREN_W::new(self, 0)
89 }
90 #[doc = "Bit 1"]
91 #[inline(always)]
92 pub fn isothren(&mut self) -> ISOTHREN_W<DTHRCTL_SPEC> {
93 ISOTHREN_W::new(self, 1)
94 }
95 #[doc = "Bits 2:10"]
96 #[inline(always)]
97 pub fn txthrlen(&mut self) -> TXTHRLEN_W<DTHRCTL_SPEC> {
98 TXTHRLEN_W::new(self, 2)
99 }
100 #[doc = "Bits 11:12"]
101 #[inline(always)]
102 pub fn ahbthrratio(&mut self) -> AHBTHRRATIO_W<DTHRCTL_SPEC> {
103 AHBTHRRATIO_W::new(self, 11)
104 }
105 #[doc = "Bit 16"]
106 #[inline(always)]
107 pub fn rxthren(&mut self) -> RXTHREN_W<DTHRCTL_SPEC> {
108 RXTHREN_W::new(self, 16)
109 }
110 #[doc = "Bits 17:25"]
111 #[inline(always)]
112 pub fn rxthrlen(&mut self) -> RXTHRLEN_W<DTHRCTL_SPEC> {
113 RXTHRLEN_W::new(self, 17)
114 }
115 #[doc = "Bit 27"]
116 #[inline(always)]
117 pub fn arbprken(&mut self) -> ARBPRKEN_W<DTHRCTL_SPEC> {
118 ARBPRKEN_W::new(self, 27)
119 }
120}
121#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`dthrctl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dthrctl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
122pub struct DTHRCTL_SPEC;
123impl crate::RegisterSpec for DTHRCTL_SPEC {
124 type Ux = u32;
125}
126#[doc = "`read()` method returns [`dthrctl::R`](R) reader structure"]
127impl crate::Readable for DTHRCTL_SPEC {}
128#[doc = "`write(|w| ..)` method takes [`dthrctl::W`](W) writer structure"]
129impl crate::Writable for DTHRCTL_SPEC {
130 type Safety = crate::Unsafe;
131}
132#[doc = "`reset()` method sets DTHRCTL to value 0x0802_0020"]
133impl crate::Resettable for DTHRCTL_SPEC {
134 const RESET_VALUE: u32 = 0x0802_0020;
135}