esp32s2/spi2/
dma_int_raw.rs1#[doc = "Register `DMA_INT_RAW` reader"]
2pub type R = crate::R<DMA_INT_RAW_SPEC>;
3#[doc = "Register `DMA_INT_RAW` writer"]
4pub type W = crate::W<DMA_INT_RAW_SPEC>;
5#[doc = "Field `INLINK_DSCR_EMPTY` reader - The raw bit for lack of enough inlink descriptors. Can be configured in CONF state."]
6pub type INLINK_DSCR_EMPTY_R = crate::BitReader;
7#[doc = "Field `OUTLINK_DSCR_ERROR` reader - The raw bit for outlink descriptor error. Can be configured in CONF state."]
8pub type OUTLINK_DSCR_ERROR_R = crate::BitReader;
9#[doc = "Field `INLINK_DSCR_ERROR` reader - The raw bit for inlink descriptor error. Can be configured in CONF state."]
10pub type INLINK_DSCR_ERROR_R = crate::BitReader;
11#[doc = "Field `IN_DONE` reader - The raw bit for completing usage of a inlink descriptor. Can be configured in CONF state."]
12pub type IN_DONE_R = crate::BitReader;
13#[doc = "Field `IN_ERR_EOF` reader - The raw bit for receiving error. Can be configured in CONF state."]
14pub type IN_ERR_EOF_R = crate::BitReader;
15#[doc = "Field `IN_SUC_EOF` reader - The raw bit for completing receiving all the packets from host. Can be configured in CONF state."]
16pub type IN_SUC_EOF_R = crate::BitReader;
17#[doc = "Field `OUT_DONE` reader - The raw bit for completing usage of a outlink descriptor. Can be configured in CONF state."]
18pub type OUT_DONE_R = crate::BitReader;
19#[doc = "Field `OUT_EOF` reader - The raw bit for sending a packet to host done. Can be configured in CONF state."]
20pub type OUT_EOF_R = crate::BitReader;
21#[doc = "Field `OUT_TOTAL_EOF` reader - The raw bit for sending all the packets to host done. Can be configured in CONF state."]
22pub type OUT_TOTAL_EOF_R = crate::BitReader;
23#[doc = "Field `INFIFO_FULL_ERR` reader - 1:SPI_DMA_INFIFO_FULL and spi_push_data_prep are valid, which means that DMA Rx buffer is full but push is valid. 0: Others. Can not be changed by CONF_buf."]
24pub type INFIFO_FULL_ERR_R = crate::BitReader;
25#[doc = "Field `OUTFIFO_EMPTY_ERR` reader - 1:SPI_DMA_OUTFIFO_EMPTY and spi_pop_data_prep are valid, which means that there is no data to pop but pop is valid. 0: Others. Can not be changed by CONF_buf."]
26pub type OUTFIFO_EMPTY_ERR_R = crate::BitReader;
27#[doc = "Field `SLV_CMD6` reader - The raw bit for SPI slave CMD6 interrupt."]
28pub type SLV_CMD6_R = crate::BitReader;
29#[doc = "Field `SLV_CMD6` writer - The raw bit for SPI slave CMD6 interrupt."]
30pub type SLV_CMD6_W<'a, REG> = crate::BitWriter<'a, REG>;
31#[doc = "Field `SLV_CMD7` reader - The raw bit for SPI slave CMD7 interrupt."]
32pub type SLV_CMD7_R = crate::BitReader;
33#[doc = "Field `SLV_CMD7` writer - The raw bit for SPI slave CMD7 interrupt."]
34pub type SLV_CMD7_W<'a, REG> = crate::BitWriter<'a, REG>;
35#[doc = "Field `SLV_CMD8` reader - The raw bit for SPI slave CMD8 interrupt."]
36pub type SLV_CMD8_R = crate::BitReader;
37#[doc = "Field `SLV_CMD8` writer - The raw bit for SPI slave CMD8 interrupt."]
38pub type SLV_CMD8_W<'a, REG> = crate::BitWriter<'a, REG>;
39#[doc = "Field `SLV_CMD9` reader - The raw bit for SPI slave CMD9 interrupt."]
40pub type SLV_CMD9_R = crate::BitReader;
41#[doc = "Field `SLV_CMD9` writer - The raw bit for SPI slave CMD9 interrupt."]
42pub type SLV_CMD9_W<'a, REG> = crate::BitWriter<'a, REG>;
43#[doc = "Field `SLV_CMDA` reader - The raw bit for SPI slave CMDA interrupt."]
44pub type SLV_CMDA_R = crate::BitReader;
45#[doc = "Field `SLV_CMDA` writer - The raw bit for SPI slave CMDA interrupt."]
46pub type SLV_CMDA_W<'a, REG> = crate::BitWriter<'a, REG>;
47impl R {
48 #[doc = "Bit 0 - The raw bit for lack of enough inlink descriptors. Can be configured in CONF state."]
49 #[inline(always)]
50 pub fn inlink_dscr_empty(&self) -> INLINK_DSCR_EMPTY_R {
51 INLINK_DSCR_EMPTY_R::new((self.bits & 1) != 0)
52 }
53 #[doc = "Bit 1 - The raw bit for outlink descriptor error. Can be configured in CONF state."]
54 #[inline(always)]
55 pub fn outlink_dscr_error(&self) -> OUTLINK_DSCR_ERROR_R {
56 OUTLINK_DSCR_ERROR_R::new(((self.bits >> 1) & 1) != 0)
57 }
58 #[doc = "Bit 2 - The raw bit for inlink descriptor error. Can be configured in CONF state."]
59 #[inline(always)]
60 pub fn inlink_dscr_error(&self) -> INLINK_DSCR_ERROR_R {
61 INLINK_DSCR_ERROR_R::new(((self.bits >> 2) & 1) != 0)
62 }
63 #[doc = "Bit 3 - The raw bit for completing usage of a inlink descriptor. Can be configured in CONF state."]
64 #[inline(always)]
65 pub fn in_done(&self) -> IN_DONE_R {
66 IN_DONE_R::new(((self.bits >> 3) & 1) != 0)
67 }
68 #[doc = "Bit 4 - The raw bit for receiving error. Can be configured in CONF state."]
69 #[inline(always)]
70 pub fn in_err_eof(&self) -> IN_ERR_EOF_R {
71 IN_ERR_EOF_R::new(((self.bits >> 4) & 1) != 0)
72 }
73 #[doc = "Bit 5 - The raw bit for completing receiving all the packets from host. Can be configured in CONF state."]
74 #[inline(always)]
75 pub fn in_suc_eof(&self) -> IN_SUC_EOF_R {
76 IN_SUC_EOF_R::new(((self.bits >> 5) & 1) != 0)
77 }
78 #[doc = "Bit 6 - The raw bit for completing usage of a outlink descriptor. Can be configured in CONF state."]
79 #[inline(always)]
80 pub fn out_done(&self) -> OUT_DONE_R {
81 OUT_DONE_R::new(((self.bits >> 6) & 1) != 0)
82 }
83 #[doc = "Bit 7 - The raw bit for sending a packet to host done. Can be configured in CONF state."]
84 #[inline(always)]
85 pub fn out_eof(&self) -> OUT_EOF_R {
86 OUT_EOF_R::new(((self.bits >> 7) & 1) != 0)
87 }
88 #[doc = "Bit 8 - The raw bit for sending all the packets to host done. Can be configured in CONF state."]
89 #[inline(always)]
90 pub fn out_total_eof(&self) -> OUT_TOTAL_EOF_R {
91 OUT_TOTAL_EOF_R::new(((self.bits >> 8) & 1) != 0)
92 }
93 #[doc = "Bit 9 - 1:SPI_DMA_INFIFO_FULL and spi_push_data_prep are valid, which means that DMA Rx buffer is full but push is valid. 0: Others. Can not be changed by CONF_buf."]
94 #[inline(always)]
95 pub fn infifo_full_err(&self) -> INFIFO_FULL_ERR_R {
96 INFIFO_FULL_ERR_R::new(((self.bits >> 9) & 1) != 0)
97 }
98 #[doc = "Bit 10 - 1:SPI_DMA_OUTFIFO_EMPTY and spi_pop_data_prep are valid, which means that there is no data to pop but pop is valid. 0: Others. Can not be changed by CONF_buf."]
99 #[inline(always)]
100 pub fn outfifo_empty_err(&self) -> OUTFIFO_EMPTY_ERR_R {
101 OUTFIFO_EMPTY_ERR_R::new(((self.bits >> 10) & 1) != 0)
102 }
103 #[doc = "Bit 11 - The raw bit for SPI slave CMD6 interrupt."]
104 #[inline(always)]
105 pub fn slv_cmd6(&self) -> SLV_CMD6_R {
106 SLV_CMD6_R::new(((self.bits >> 11) & 1) != 0)
107 }
108 #[doc = "Bit 12 - The raw bit for SPI slave CMD7 interrupt."]
109 #[inline(always)]
110 pub fn slv_cmd7(&self) -> SLV_CMD7_R {
111 SLV_CMD7_R::new(((self.bits >> 12) & 1) != 0)
112 }
113 #[doc = "Bit 13 - The raw bit for SPI slave CMD8 interrupt."]
114 #[inline(always)]
115 pub fn slv_cmd8(&self) -> SLV_CMD8_R {
116 SLV_CMD8_R::new(((self.bits >> 13) & 1) != 0)
117 }
118 #[doc = "Bit 14 - The raw bit for SPI slave CMD9 interrupt."]
119 #[inline(always)]
120 pub fn slv_cmd9(&self) -> SLV_CMD9_R {
121 SLV_CMD9_R::new(((self.bits >> 14) & 1) != 0)
122 }
123 #[doc = "Bit 15 - The raw bit for SPI slave CMDA interrupt."]
124 #[inline(always)]
125 pub fn slv_cmda(&self) -> SLV_CMDA_R {
126 SLV_CMDA_R::new(((self.bits >> 15) & 1) != 0)
127 }
128}
129#[cfg(feature = "impl-register-debug")]
130impl core::fmt::Debug for R {
131 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
132 f.debug_struct("DMA_INT_RAW")
133 .field("inlink_dscr_empty", &self.inlink_dscr_empty())
134 .field("outlink_dscr_error", &self.outlink_dscr_error())
135 .field("inlink_dscr_error", &self.inlink_dscr_error())
136 .field("in_done", &self.in_done())
137 .field("in_err_eof", &self.in_err_eof())
138 .field("in_suc_eof", &self.in_suc_eof())
139 .field("out_done", &self.out_done())
140 .field("out_eof", &self.out_eof())
141 .field("out_total_eof", &self.out_total_eof())
142 .field("infifo_full_err", &self.infifo_full_err())
143 .field("outfifo_empty_err", &self.outfifo_empty_err())
144 .field("slv_cmd6", &self.slv_cmd6())
145 .field("slv_cmd7", &self.slv_cmd7())
146 .field("slv_cmd8", &self.slv_cmd8())
147 .field("slv_cmd9", &self.slv_cmd9())
148 .field("slv_cmda", &self.slv_cmda())
149 .finish()
150 }
151}
152impl W {
153 #[doc = "Bit 11 - The raw bit for SPI slave CMD6 interrupt."]
154 #[inline(always)]
155 pub fn slv_cmd6(&mut self) -> SLV_CMD6_W<DMA_INT_RAW_SPEC> {
156 SLV_CMD6_W::new(self, 11)
157 }
158 #[doc = "Bit 12 - The raw bit for SPI slave CMD7 interrupt."]
159 #[inline(always)]
160 pub fn slv_cmd7(&mut self) -> SLV_CMD7_W<DMA_INT_RAW_SPEC> {
161 SLV_CMD7_W::new(self, 12)
162 }
163 #[doc = "Bit 13 - The raw bit for SPI slave CMD8 interrupt."]
164 #[inline(always)]
165 pub fn slv_cmd8(&mut self) -> SLV_CMD8_W<DMA_INT_RAW_SPEC> {
166 SLV_CMD8_W::new(self, 13)
167 }
168 #[doc = "Bit 14 - The raw bit for SPI slave CMD9 interrupt."]
169 #[inline(always)]
170 pub fn slv_cmd9(&mut self) -> SLV_CMD9_W<DMA_INT_RAW_SPEC> {
171 SLV_CMD9_W::new(self, 14)
172 }
173 #[doc = "Bit 15 - The raw bit for SPI slave CMDA interrupt."]
174 #[inline(always)]
175 pub fn slv_cmda(&mut self) -> SLV_CMDA_W<DMA_INT_RAW_SPEC> {
176 SLV_CMDA_W::new(self, 15)
177 }
178}
179#[doc = "SPI DMA interrupt raw register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_int_raw::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_int_raw::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
180pub struct DMA_INT_RAW_SPEC;
181impl crate::RegisterSpec for DMA_INT_RAW_SPEC {
182 type Ux = u32;
183}
184#[doc = "`read()` method returns [`dma_int_raw::R`](R) reader structure"]
185impl crate::Readable for DMA_INT_RAW_SPEC {}
186#[doc = "`write(|w| ..)` method takes [`dma_int_raw::W`](W) writer structure"]
187impl crate::Writable for DMA_INT_RAW_SPEC {
188 type Safety = crate::Unsafe;
189}
190#[doc = "`reset()` method sets DMA_INT_RAW to value 0"]
191impl crate::Resettable for DMA_INT_RAW_SPEC {}