esp32s2/crypto_dma/
int_raw.rs

1#[doc = "Register `INT_RAW` reader"]
2pub type R = crate::R<INT_RAW_SPEC>;
3#[doc = "Field `IN_DONE` reader - Set when the last data of one frame is received or the receive buffer is full indicated by receive descriptor."]
4pub type IN_DONE_R = crate::BitReader;
5#[doc = "Field `IN_SUC_EOF` reader - Set when the last data of one frame is received by Crypto DMA RX FIFO."]
6pub type IN_SUC_EOF_R = crate::BitReader;
7#[doc = "Field `IN_ERR_EOF` reader - Reserved"]
8pub type IN_ERR_EOF_R = crate::BitReader;
9#[doc = "Field `OUT_DONE` reader - Set when all data indicated by one transmit descriptor has been pushed into TX FIFO."]
10pub type OUT_DONE_R = crate::BitReader;
11#[doc = "Field `OUT_EOF` reader - Set when Out EOF flag is generated."]
12pub type OUT_EOF_R = crate::BitReader;
13#[doc = "Field `IN_DSCR_ERR` reader - Set when detecting receive descriptor error, including owner error, the second and third word error of receive descriptor."]
14pub type IN_DSCR_ERR_R = crate::BitReader;
15#[doc = "Field `OUT_DSCR_ERR` reader - Set when detecting transmit descriptor error, including owner error, the second and third word error of transmit descriptor."]
16pub type OUT_DSCR_ERR_R = crate::BitReader;
17#[doc = "Field `IN_DSCR_EMPTY` reader - Set when receiving data is completed and no more receive descriptor."]
18pub type IN_DSCR_EMPTY_R = crate::BitReader;
19#[doc = "Field `OUT_TOTAL_EOF` reader - Set when data corresponding to all transmit descriptor and the last descriptor with valid EOF is transmitted out."]
20pub type OUT_TOTAL_EOF_R = crate::BitReader;
21#[doc = "Field `INFIFO_FULL_WM` reader - Set when received data byte number is up to threshold configured by CRYPTO_DMA_INFIFO_FULL_THRS in RX FIFO."]
22pub type INFIFO_FULL_WM_R = crate::BitReader;
23impl R {
24    #[doc = "Bit 0 - Set when the last data of one frame is received or the receive buffer is full indicated by receive descriptor."]
25    #[inline(always)]
26    pub fn in_done(&self) -> IN_DONE_R {
27        IN_DONE_R::new((self.bits & 1) != 0)
28    }
29    #[doc = "Bit 1 - Set when the last data of one frame is received by Crypto DMA RX FIFO."]
30    #[inline(always)]
31    pub fn in_suc_eof(&self) -> IN_SUC_EOF_R {
32        IN_SUC_EOF_R::new(((self.bits >> 1) & 1) != 0)
33    }
34    #[doc = "Bit 2 - Reserved"]
35    #[inline(always)]
36    pub fn in_err_eof(&self) -> IN_ERR_EOF_R {
37        IN_ERR_EOF_R::new(((self.bits >> 2) & 1) != 0)
38    }
39    #[doc = "Bit 3 - Set when all data indicated by one transmit descriptor has been pushed into TX FIFO."]
40    #[inline(always)]
41    pub fn out_done(&self) -> OUT_DONE_R {
42        OUT_DONE_R::new(((self.bits >> 3) & 1) != 0)
43    }
44    #[doc = "Bit 4 - Set when Out EOF flag is generated."]
45    #[inline(always)]
46    pub fn out_eof(&self) -> OUT_EOF_R {
47        OUT_EOF_R::new(((self.bits >> 4) & 1) != 0)
48    }
49    #[doc = "Bit 5 - Set when detecting receive descriptor error, including owner error, the second and third word error of receive descriptor."]
50    #[inline(always)]
51    pub fn in_dscr_err(&self) -> IN_DSCR_ERR_R {
52        IN_DSCR_ERR_R::new(((self.bits >> 5) & 1) != 0)
53    }
54    #[doc = "Bit 6 - Set when detecting transmit descriptor error, including owner error, the second and third word error of transmit descriptor."]
55    #[inline(always)]
56    pub fn out_dscr_err(&self) -> OUT_DSCR_ERR_R {
57        OUT_DSCR_ERR_R::new(((self.bits >> 6) & 1) != 0)
58    }
59    #[doc = "Bit 7 - Set when receiving data is completed and no more receive descriptor."]
60    #[inline(always)]
61    pub fn in_dscr_empty(&self) -> IN_DSCR_EMPTY_R {
62        IN_DSCR_EMPTY_R::new(((self.bits >> 7) & 1) != 0)
63    }
64    #[doc = "Bit 8 - Set when data corresponding to all transmit descriptor and the last descriptor with valid EOF is transmitted out."]
65    #[inline(always)]
66    pub fn out_total_eof(&self) -> OUT_TOTAL_EOF_R {
67        OUT_TOTAL_EOF_R::new(((self.bits >> 8) & 1) != 0)
68    }
69    #[doc = "Bit 9 - Set when received data byte number is up to threshold configured by CRYPTO_DMA_INFIFO_FULL_THRS in RX FIFO."]
70    #[inline(always)]
71    pub fn infifo_full_wm(&self) -> INFIFO_FULL_WM_R {
72        INFIFO_FULL_WM_R::new(((self.bits >> 9) & 1) != 0)
73    }
74}
75#[cfg(feature = "impl-register-debug")]
76impl core::fmt::Debug for R {
77    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
78        f.debug_struct("INT_RAW")
79            .field("in_done", &self.in_done())
80            .field("in_suc_eof", &self.in_suc_eof())
81            .field("in_err_eof", &self.in_err_eof())
82            .field("out_done", &self.out_done())
83            .field("out_eof", &self.out_eof())
84            .field("in_dscr_err", &self.in_dscr_err())
85            .field("out_dscr_err", &self.out_dscr_err())
86            .field("in_dscr_empty", &self.in_dscr_empty())
87            .field("out_total_eof", &self.out_total_eof())
88            .field("infifo_full_wm", &self.infifo_full_wm())
89            .finish()
90    }
91}
92#[doc = "Raw interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`int_raw::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
93pub struct INT_RAW_SPEC;
94impl crate::RegisterSpec for INT_RAW_SPEC {
95    type Ux = u32;
96}
97#[doc = "`read()` method returns [`int_raw::R`](R) reader structure"]
98impl crate::Readable for INT_RAW_SPEC {}
99#[doc = "`reset()` method sets INT_RAW to value 0"]
100impl crate::Resettable for INT_RAW_SPEC {}
esp32s2/crypto_dma/int_raw.rs

esp32s2/crypto_dma/
int_raw.rs
