esp32s2/copy_dma/
int_raw.rs

1#[doc = "Register `INT_RAW` reader"]
2pub type R = crate::R<INT_RAW_SPEC>;
3#[doc = "Field `IN_DONE` reader - Triggered when the last data of frame is received or the receive buffer is full indicated by receive descriptor."]
4pub type IN_DONE_R = crate::BitReader;
5#[doc = "Field `IN_SUC_EOF` reader - Triggered when the last data of one frame is received."]
6pub type IN_SUC_EOF_R = crate::BitReader;
7#[doc = "Field `OUT_DONE` reader - Triggered when all data indicated by one transmit descriptor has been pushed into TX FIFO."]
8pub type OUT_DONE_R = crate::BitReader;
9#[doc = "Field `OUT_EOF` reader - Triggered when the last data with EOF flag has been pushed into TX FIFO."]
10pub type OUT_EOF_R = crate::BitReader;
11#[doc = "Field `IN_DSCR_ERR` reader - Triggered when detecting receive descriptor error, including owner error, the second and third word error of receive descriptor."]
12pub type IN_DSCR_ERR_R = crate::BitReader;
13#[doc = "Field `OUT_DSCR_ERR` reader - Triggered when detecting transmit descriptor error, including owner error, the second and third word error of transmit descriptor."]
14pub type OUT_DSCR_ERR_R = crate::BitReader;
15#[doc = "Field `IN_DSCR_EMPTY` reader - Triggered when receiving data is completed and no more receive descriptor."]
16pub type IN_DSCR_EMPTY_R = crate::BitReader;
17#[doc = "Field `OUT_TOTAL_EOF` reader - Triggered when data corresponding to all transmit descriptors and the last descriptor with valid EOF is transmitted out."]
18pub type OUT_TOTAL_EOF_R = crate::BitReader;
19impl R {
20    #[doc = "Bit 0 - Triggered when the last data of frame is received or the receive buffer is full indicated by receive descriptor."]
21    #[inline(always)]
22    pub fn in_done(&self) -> IN_DONE_R {
23        IN_DONE_R::new((self.bits & 1) != 0)
24    }
25    #[doc = "Bit 1 - Triggered when the last data of one frame is received."]
26    #[inline(always)]
27    pub fn in_suc_eof(&self) -> IN_SUC_EOF_R {
28        IN_SUC_EOF_R::new(((self.bits >> 1) & 1) != 0)
29    }
30    #[doc = "Bit 2 - Triggered when all data indicated by one transmit descriptor has been pushed into TX FIFO."]
31    #[inline(always)]
32    pub fn out_done(&self) -> OUT_DONE_R {
33        OUT_DONE_R::new(((self.bits >> 2) & 1) != 0)
34    }
35    #[doc = "Bit 3 - Triggered when the last data with EOF flag has been pushed into TX FIFO."]
36    #[inline(always)]
37    pub fn out_eof(&self) -> OUT_EOF_R {
38        OUT_EOF_R::new(((self.bits >> 3) & 1) != 0)
39    }
40    #[doc = "Bit 4 - Triggered when detecting receive descriptor error, including owner error, the second and third word error of receive descriptor."]
41    #[inline(always)]
42    pub fn in_dscr_err(&self) -> IN_DSCR_ERR_R {
43        IN_DSCR_ERR_R::new(((self.bits >> 4) & 1) != 0)
44    }
45    #[doc = "Bit 5 - Triggered when detecting transmit descriptor error, including owner error, the second and third word error of transmit descriptor."]
46    #[inline(always)]
47    pub fn out_dscr_err(&self) -> OUT_DSCR_ERR_R {
48        OUT_DSCR_ERR_R::new(((self.bits >> 5) & 1) != 0)
49    }
50    #[doc = "Bit 6 - Triggered when receiving data is completed and no more receive descriptor."]
51    #[inline(always)]
52    pub fn in_dscr_empty(&self) -> IN_DSCR_EMPTY_R {
53        IN_DSCR_EMPTY_R::new(((self.bits >> 6) & 1) != 0)
54    }
55    #[doc = "Bit 7 - Triggered when data corresponding to all transmit descriptors and the last descriptor with valid EOF is transmitted out."]
56    #[inline(always)]
57    pub fn out_total_eof(&self) -> OUT_TOTAL_EOF_R {
58        OUT_TOTAL_EOF_R::new(((self.bits >> 7) & 1) != 0)
59    }
60}
61#[cfg(feature = "impl-register-debug")]
62impl core::fmt::Debug for R {
63    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
64        f.debug_struct("INT_RAW")
65            .field("in_done", &self.in_done())
66            .field("in_suc_eof", &self.in_suc_eof())
67            .field("out_done", &self.out_done())
68            .field("out_eof", &self.out_eof())
69            .field("in_dscr_err", &self.in_dscr_err())
70            .field("out_dscr_err", &self.out_dscr_err())
71            .field("in_dscr_empty", &self.in_dscr_empty())
72            .field("out_total_eof", &self.out_total_eof())
73            .finish()
74    }
75}
76#[doc = "Raw interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`int_raw::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
77pub struct INT_RAW_SPEC;
78impl crate::RegisterSpec for INT_RAW_SPEC {
79    type Ux = u32;
80}
81#[doc = "`read()` method returns [`int_raw::R`](R) reader structure"]
82impl crate::Readable for INT_RAW_SPEC {}
83#[doc = "`reset()` method sets INT_RAW to value 0"]
84impl crate::Resettable for INT_RAW_SPEC {}
esp32s2/copy_dma/int_raw.rs

esp32s2/copy_dma/
int_raw.rs
