Module mem_conf

UART threshold and allocation configuration

Structs

MEM_CONF_SPEC

UART threshold and allocation configuration

Type Aliases

MEM_FORCE_PD_R

Field MEM_FORCE_PD reader - Set this bit to force power down UART RAM.

MEM_FORCE_PD_W

Field MEM_FORCE_PD writer - Set this bit to force power down UART RAM.

MEM_FORCE_PU_R

Field MEM_FORCE_PU reader - Set this bit to force power up UART RAM.

MEM_FORCE_PU_W

Field MEM_FORCE_PU writer - Set this bit to force power up UART RAM.

R

Register MEM_CONF reader

RX_FLOW_THRHD_R

Field RX_FLOW_THRHD reader - This register is used to configure the maximum amount of data bytes that can be received when hardware flow control works.

RX_FLOW_THRHD_W

Field RX_FLOW_THRHD writer - This register is used to configure the maximum amount of data bytes that can be received when hardware flow control works.

RX_SIZE_R

Field RX_SIZE reader - This register is used to configure the amount of RAM allocated for RX FIFO. The default number is 128 bytes.

RX_SIZE_W

Field RX_SIZE writer - This register is used to configure the amount of RAM allocated for RX FIFO. The default number is 128 bytes.

RX_TOUT_THRHD_R

Field RX_TOUT_THRHD reader - This register is used to configure the threshold time that the receiver takes to receive one byte, in the unit of bit time (the time it takes to transfer one bit). The UART_RXFIFO_TOUT_INT interrupt will be triggered when the receiver takes more time to receive one byte with UART RX_TOUT_EN set to 1.

RX_TOUT_THRHD_W

Field RX_TOUT_THRHD writer - This register is used to configure the threshold time that the receiver takes to receive one byte, in the unit of bit time (the time it takes to transfer one bit). The UART_RXFIFO_TOUT_INT interrupt will be triggered when the receiver takes more time to receive one byte with UART RX_TOUT_EN set to 1.

TX_SIZE_R

Field TX_SIZE reader - This register is used to configure the amount of RAM allocated for TX FIFO. The default number is 128 bytes.

TX_SIZE_W

Field TX_SIZE writer - This register is used to configure the amount of RAM allocated for TX FIFO. The default number is 128 bytes.

W

Register MEM_CONF writer