1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 fifo: FIFO,
6 int_raw: INT_RAW,
7 int_st: INT_ST,
8 int_ena: INT_ENA,
9 int_clr: INT_CLR,
10 clkdiv: CLKDIV,
11 autobaud: AUTOBAUD,
12 status: STATUS,
13 conf0: CONF0,
14 conf1: CONF1,
15 lowpulse: LOWPULSE,
16 highpulse: HIGHPULSE,
17 rxd_cnt: RXD_CNT,
18 flow_conf: FLOW_CONF,
19 sleep_conf: SLEEP_CONF,
20 swfc_conf0: SWFC_CONF0,
21 swfc_conf1: SWFC_CONF1,
22 idle_conf: IDLE_CONF,
23 rs485_conf: RS485_CONF,
24 at_cmd_precnt: AT_CMD_PRECNT,
25 at_cmd_postcnt: AT_CMD_POSTCNT,
26 at_cmd_gaptout: AT_CMD_GAPTOUT,
27 at_cmd_char: AT_CMD_CHAR,
28 mem_conf: MEM_CONF,
29 mem_tx_status: MEM_TX_STATUS,
30 mem_rx_status: MEM_RX_STATUS,
31 fsm_status: FSM_STATUS,
32 pospulse: POSPULSE,
33 negpulse: NEGPULSE,
34 date: DATE,
35 id: ID,
36}
37impl RegisterBlock {
38 #[doc = "0x00 - FIFO data register"]
39 #[inline(always)]
40 pub const fn fifo(&self) -> &FIFO {
41 &self.fifo
42 }
43 #[doc = "0x04 - Raw interrupt status"]
44 #[inline(always)]
45 pub const fn int_raw(&self) -> &INT_RAW {
46 &self.int_raw
47 }
48 #[doc = "0x08 - Masked interrupt status"]
49 #[inline(always)]
50 pub const fn int_st(&self) -> &INT_ST {
51 &self.int_st
52 }
53 #[doc = "0x0c - Interrupt enable bits"]
54 #[inline(always)]
55 pub const fn int_ena(&self) -> &INT_ENA {
56 &self.int_ena
57 }
58 #[doc = "0x10 - Interrupt clear bits"]
59 #[inline(always)]
60 pub const fn int_clr(&self) -> &INT_CLR {
61 &self.int_clr
62 }
63 #[doc = "0x14 - Clock divider configuration"]
64 #[inline(always)]
65 pub const fn clkdiv(&self) -> &CLKDIV {
66 &self.clkdiv
67 }
68 #[doc = "0x18 - Autobaud configuration register"]
69 #[inline(always)]
70 pub const fn autobaud(&self) -> &AUTOBAUD {
71 &self.autobaud
72 }
73 #[doc = "0x1c - UART status register"]
74 #[inline(always)]
75 pub const fn status(&self) -> &STATUS {
76 &self.status
77 }
78 #[doc = "0x20 - Configuration register 0"]
79 #[inline(always)]
80 pub const fn conf0(&self) -> &CONF0 {
81 &self.conf0
82 }
83 #[doc = "0x24 - Configuration register 1"]
84 #[inline(always)]
85 pub const fn conf1(&self) -> &CONF1 {
86 &self.conf1
87 }
88 #[doc = "0x28 - Autobaud minimum low pulse duration register"]
89 #[inline(always)]
90 pub const fn lowpulse(&self) -> &LOWPULSE {
91 &self.lowpulse
92 }
93 #[doc = "0x2c - Autobaud minimum high pulse duration register"]
94 #[inline(always)]
95 pub const fn highpulse(&self) -> &HIGHPULSE {
96 &self.highpulse
97 }
98 #[doc = "0x30 - Autobaud edge change count register"]
99 #[inline(always)]
100 pub const fn rxd_cnt(&self) -> &RXD_CNT {
101 &self.rxd_cnt
102 }
103 #[doc = "0x34 - Software flow control configuration"]
104 #[inline(always)]
105 pub const fn flow_conf(&self) -> &FLOW_CONF {
106 &self.flow_conf
107 }
108 #[doc = "0x38 - Sleep mode configuration"]
109 #[inline(always)]
110 pub const fn sleep_conf(&self) -> &SLEEP_CONF {
111 &self.sleep_conf
112 }
113 #[doc = "0x3c - Software flow control character configuration"]
114 #[inline(always)]
115 pub const fn swfc_conf0(&self) -> &SWFC_CONF0 {
116 &self.swfc_conf0
117 }
118 #[doc = "0x40 - Software flow-control character configuration"]
119 #[inline(always)]
120 pub const fn swfc_conf1(&self) -> &SWFC_CONF1 {
121 &self.swfc_conf1
122 }
123 #[doc = "0x44 - Frame end idle time configuration"]
124 #[inline(always)]
125 pub const fn idle_conf(&self) -> &IDLE_CONF {
126 &self.idle_conf
127 }
128 #[doc = "0x48 - RS485 mode configuration"]
129 #[inline(always)]
130 pub const fn rs485_conf(&self) -> &RS485_CONF {
131 &self.rs485_conf
132 }
133 #[doc = "0x4c - Pre-sequence timing configuration"]
134 #[inline(always)]
135 pub const fn at_cmd_precnt(&self) -> &AT_CMD_PRECNT {
136 &self.at_cmd_precnt
137 }
138 #[doc = "0x50 - Post-sequence timing configuration"]
139 #[inline(always)]
140 pub const fn at_cmd_postcnt(&self) -> &AT_CMD_POSTCNT {
141 &self.at_cmd_postcnt
142 }
143 #[doc = "0x54 - Timeout configuration"]
144 #[inline(always)]
145 pub const fn at_cmd_gaptout(&self) -> &AT_CMD_GAPTOUT {
146 &self.at_cmd_gaptout
147 }
148 #[doc = "0x58 - AT escape sequence selection configuration"]
149 #[inline(always)]
150 pub const fn at_cmd_char(&self) -> &AT_CMD_CHAR {
151 &self.at_cmd_char
152 }
153 #[doc = "0x5c - UART threshold and allocation configuration"]
154 #[inline(always)]
155 pub const fn mem_conf(&self) -> &MEM_CONF {
156 &self.mem_conf
157 }
158 #[doc = "0x60 - TX FIFO write and read offset address"]
159 #[inline(always)]
160 pub const fn mem_tx_status(&self) -> &MEM_TX_STATUS {
161 &self.mem_tx_status
162 }
163 #[doc = "0x64 - RX FIFO write and read offset address"]
164 #[inline(always)]
165 pub const fn mem_rx_status(&self) -> &MEM_RX_STATUS {
166 &self.mem_rx_status
167 }
168 #[doc = "0x68 - UART transmitter and receiver status"]
169 #[inline(always)]
170 pub const fn fsm_status(&self) -> &FSM_STATUS {
171 &self.fsm_status
172 }
173 #[doc = "0x6c - Autobaud high pulse register"]
174 #[inline(always)]
175 pub const fn pospulse(&self) -> &POSPULSE {
176 &self.pospulse
177 }
178 #[doc = "0x70 - Autobaud low pulse register"]
179 #[inline(always)]
180 pub const fn negpulse(&self) -> &NEGPULSE {
181 &self.negpulse
182 }
183 #[doc = "0x74 - UART version control register"]
184 #[inline(always)]
185 pub const fn date(&self) -> &DATE {
186 &self.date
187 }
188 #[doc = "0x78 - UART ID register"]
189 #[inline(always)]
190 pub const fn id(&self) -> &ID {
191 &self.id
192 }
193}
194#[doc = "FIFO (rw) register accessor: FIFO data register\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo`] module"]
195pub type FIFO = crate::Reg<fifo::FIFO_SPEC>;
196#[doc = "FIFO data register"]
197pub mod fifo;
198#[doc = "INT_RAW (r) register accessor: Raw interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`int_raw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_raw`] module"]
199pub type INT_RAW = crate::Reg<int_raw::INT_RAW_SPEC>;
200#[doc = "Raw interrupt status"]
201pub mod int_raw;
202#[doc = "INT_ST (r) register accessor: Masked interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`int_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_st`] module"]
203pub type INT_ST = crate::Reg<int_st::INT_ST_SPEC>;
204#[doc = "Masked interrupt status"]
205pub mod int_st;
206#[doc = "INT_ENA (rw) register accessor: Interrupt enable bits\n\nYou can [`read`](crate::Reg::read) this register and get [`int_ena::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_ena::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_ena`] module"]
207pub type INT_ENA = crate::Reg<int_ena::INT_ENA_SPEC>;
208#[doc = "Interrupt enable bits"]
209pub mod int_ena;
210#[doc = "INT_CLR (w) register accessor: Interrupt clear bits\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_clr`] module"]
211pub type INT_CLR = crate::Reg<int_clr::INT_CLR_SPEC>;
212#[doc = "Interrupt clear bits"]
213pub mod int_clr;
214#[doc = "CLKDIV (rw) register accessor: Clock divider configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv`] module"]
215pub type CLKDIV = crate::Reg<clkdiv::CLKDIV_SPEC>;
216#[doc = "Clock divider configuration"]
217pub mod clkdiv;
218#[doc = "AUTOBAUD (rw) register accessor: Autobaud configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`autobaud::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`autobaud::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@autobaud`] module"]
219pub type AUTOBAUD = crate::Reg<autobaud::AUTOBAUD_SPEC>;
220#[doc = "Autobaud configuration register"]
221pub mod autobaud;
222#[doc = "STATUS (r) register accessor: UART status register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] module"]
223pub type STATUS = crate::Reg<status::STATUS_SPEC>;
224#[doc = "UART status register"]
225pub mod status;
226#[doc = "CONF0 (rw) register accessor: Configuration register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`conf0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`conf0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@conf0`] module"]
227pub type CONF0 = crate::Reg<conf0::CONF0_SPEC>;
228#[doc = "Configuration register 0"]
229pub mod conf0;
230#[doc = "CONF1 (rw) register accessor: Configuration register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`conf1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`conf1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@conf1`] module"]
231pub type CONF1 = crate::Reg<conf1::CONF1_SPEC>;
232#[doc = "Configuration register 1"]
233pub mod conf1;
234#[doc = "LOWPULSE (r) register accessor: Autobaud minimum low pulse duration register\n\nYou can [`read`](crate::Reg::read) this register and get [`lowpulse::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lowpulse`] module"]
235pub type LOWPULSE = crate::Reg<lowpulse::LOWPULSE_SPEC>;
236#[doc = "Autobaud minimum low pulse duration register"]
237pub mod lowpulse;
238#[doc = "HIGHPULSE (r) register accessor: Autobaud minimum high pulse duration register\n\nYou can [`read`](crate::Reg::read) this register and get [`highpulse::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@highpulse`] module"]
239pub type HIGHPULSE = crate::Reg<highpulse::HIGHPULSE_SPEC>;
240#[doc = "Autobaud minimum high pulse duration register"]
241pub mod highpulse;
242#[doc = "RXD_CNT (r) register accessor: Autobaud edge change count register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxd_cnt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxd_cnt`] module"]
243pub type RXD_CNT = crate::Reg<rxd_cnt::RXD_CNT_SPEC>;
244#[doc = "Autobaud edge change count register"]
245pub mod rxd_cnt;
246#[doc = "FLOW_CONF (rw) register accessor: Software flow control configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`flow_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flow_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flow_conf`] module"]
247pub type FLOW_CONF = crate::Reg<flow_conf::FLOW_CONF_SPEC>;
248#[doc = "Software flow control configuration"]
249pub mod flow_conf;
250#[doc = "SLEEP_CONF (rw) register accessor: Sleep mode configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`sleep_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sleep_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sleep_conf`] module"]
251pub type SLEEP_CONF = crate::Reg<sleep_conf::SLEEP_CONF_SPEC>;
252#[doc = "Sleep mode configuration"]
253pub mod sleep_conf;
254#[doc = "SWFC_CONF0 (rw) register accessor: Software flow control character configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`swfc_conf0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swfc_conf0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swfc_conf0`] module"]
255pub type SWFC_CONF0 = crate::Reg<swfc_conf0::SWFC_CONF0_SPEC>;
256#[doc = "Software flow control character configuration"]
257pub mod swfc_conf0;
258#[doc = "SWFC_CONF1 (rw) register accessor: Software flow-control character configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`swfc_conf1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swfc_conf1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swfc_conf1`] module"]
259pub type SWFC_CONF1 = crate::Reg<swfc_conf1::SWFC_CONF1_SPEC>;
260#[doc = "Software flow-control character configuration"]
261pub mod swfc_conf1;
262#[doc = "IDLE_CONF (rw) register accessor: Frame end idle time configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`idle_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`idle_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@idle_conf`] module"]
263pub type IDLE_CONF = crate::Reg<idle_conf::IDLE_CONF_SPEC>;
264#[doc = "Frame end idle time configuration"]
265pub mod idle_conf;
266#[doc = "RS485_CONF (rw) register accessor: RS485 mode configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`rs485_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rs485_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rs485_conf`] module"]
267pub type RS485_CONF = crate::Reg<rs485_conf::RS485_CONF_SPEC>;
268#[doc = "RS485 mode configuration"]
269pub mod rs485_conf;
270#[doc = "AT_CMD_PRECNT (rw) register accessor: Pre-sequence timing configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`at_cmd_precnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`at_cmd_precnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@at_cmd_precnt`] module"]
271pub type AT_CMD_PRECNT = crate::Reg<at_cmd_precnt::AT_CMD_PRECNT_SPEC>;
272#[doc = "Pre-sequence timing configuration"]
273pub mod at_cmd_precnt;
274#[doc = "AT_CMD_POSTCNT (rw) register accessor: Post-sequence timing configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`at_cmd_postcnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`at_cmd_postcnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@at_cmd_postcnt`] module"]
275pub type AT_CMD_POSTCNT = crate::Reg<at_cmd_postcnt::AT_CMD_POSTCNT_SPEC>;
276#[doc = "Post-sequence timing configuration"]
277pub mod at_cmd_postcnt;
278#[doc = "AT_CMD_GAPTOUT (rw) register accessor: Timeout configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`at_cmd_gaptout::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`at_cmd_gaptout::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@at_cmd_gaptout`] module"]
279pub type AT_CMD_GAPTOUT = crate::Reg<at_cmd_gaptout::AT_CMD_GAPTOUT_SPEC>;
280#[doc = "Timeout configuration"]
281pub mod at_cmd_gaptout;
282#[doc = "AT_CMD_CHAR (rw) register accessor: AT escape sequence selection configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`at_cmd_char::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`at_cmd_char::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@at_cmd_char`] module"]
283pub type AT_CMD_CHAR = crate::Reg<at_cmd_char::AT_CMD_CHAR_SPEC>;
284#[doc = "AT escape sequence selection configuration"]
285pub mod at_cmd_char;
286#[doc = "MEM_CONF (rw) register accessor: UART threshold and allocation configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`mem_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mem_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mem_conf`] module"]
287pub type MEM_CONF = crate::Reg<mem_conf::MEM_CONF_SPEC>;
288#[doc = "UART threshold and allocation configuration"]
289pub mod mem_conf;
290#[doc = "MEM_TX_STATUS (r) register accessor: TX FIFO write and read offset address\n\nYou can [`read`](crate::Reg::read) this register and get [`mem_tx_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mem_tx_status`] module"]
291pub type MEM_TX_STATUS = crate::Reg<mem_tx_status::MEM_TX_STATUS_SPEC>;
292#[doc = "TX FIFO write and read offset address"]
293pub mod mem_tx_status;
294#[doc = "MEM_RX_STATUS (r) register accessor: RX FIFO write and read offset address\n\nYou can [`read`](crate::Reg::read) this register and get [`mem_rx_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mem_rx_status`] module"]
295pub type MEM_RX_STATUS = crate::Reg<mem_rx_status::MEM_RX_STATUS_SPEC>;
296#[doc = "RX FIFO write and read offset address"]
297pub mod mem_rx_status;
298#[doc = "FSM_STATUS (r) register accessor: UART transmitter and receiver status\n\nYou can [`read`](crate::Reg::read) this register and get [`fsm_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fsm_status`] module"]
299pub type FSM_STATUS = crate::Reg<fsm_status::FSM_STATUS_SPEC>;
300#[doc = "UART transmitter and receiver status"]
301pub mod fsm_status;
302#[doc = "POSPULSE (r) register accessor: Autobaud high pulse register\n\nYou can [`read`](crate::Reg::read) this register and get [`pospulse::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pospulse`] module"]
303pub type POSPULSE = crate::Reg<pospulse::POSPULSE_SPEC>;
304#[doc = "Autobaud high pulse register"]
305pub mod pospulse;
306#[doc = "NEGPULSE (r) register accessor: Autobaud low pulse register\n\nYou can [`read`](crate::Reg::read) this register and get [`negpulse::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@negpulse`] module"]
307pub type NEGPULSE = crate::Reg<negpulse::NEGPULSE_SPEC>;
308#[doc = "Autobaud low pulse register"]
309pub mod negpulse;
310#[doc = "DATE (rw) register accessor: UART version control register\n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
311pub type DATE = crate::Reg<date::DATE_SPEC>;
312#[doc = "UART version control register"]
313pub mod date;
314#[doc = "ID (rw) register accessor: UART ID register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"]
315pub type ID = crate::Reg<id::ID_SPEC>;
316#[doc = "UART ID register"]
317pub mod id;