1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 sysclk_conf: SYSCLK_CONF,
6 tick_conf: TICK_CONF,
7 clk_out_en: CLK_OUT_EN,
8 host_inf_sel: HOST_INF_SEL,
9 ext_mem_pms_lock: EXT_MEM_PMS_LOCK,
10 flash_ace0_attr: FLASH_ACE0_ATTR,
11 flash_ace1_attr: FLASH_ACE1_ATTR,
12 flash_ace2_attr: FLASH_ACE2_ATTR,
13 flash_ace3_attr: FLASH_ACE3_ATTR,
14 flash_ace0_addr: FLASH_ACE0_ADDR,
15 flash_ace1_addr: FLASH_ACE1_ADDR,
16 flash_ace2_addr: FLASH_ACE2_ADDR,
17 flash_ace3_addr: FLASH_ACE3_ADDR,
18 flash_ace0_size: FLASH_ACE0_SIZE,
19 flash_ace1_size: FLASH_ACE1_SIZE,
20 flash_ace2_size: FLASH_ACE2_SIZE,
21 flash_ace3_size: FLASH_ACE3_SIZE,
22 sram_ace0_attr: SRAM_ACE0_ATTR,
23 sram_ace1_attr: SRAM_ACE1_ATTR,
24 sram_ace2_attr: SRAM_ACE2_ATTR,
25 sram_ace3_attr: SRAM_ACE3_ATTR,
26 sram_ace0_addr: SRAM_ACE0_ADDR,
27 sram_ace1_addr: SRAM_ACE1_ADDR,
28 sram_ace2_addr: SRAM_ACE2_ADDR,
29 sram_ace3_addr: SRAM_ACE3_ADDR,
30 sram_ace0_size: SRAM_ACE0_SIZE,
31 sram_ace1_size: SRAM_ACE1_SIZE,
32 sram_ace2_size: SRAM_ACE2_SIZE,
33 sram_ace3_size: SRAM_ACE3_SIZE,
34 spi_mem_pms_ctrl: SPI_MEM_PMS_CTRL,
35 spi_mem_reject_addr: SPI_MEM_REJECT_ADDR,
36 sdio_ctrl: SDIO_CTRL,
37 redcy_sig0: REDCY_SIG0,
38 redcy_sig1: REDCY_SIG1,
39 wifi_bb_cfg: WIFI_BB_CFG,
40 wifi_bb_cfg_2: WIFI_BB_CFG_2,
41 wifi_clk_en: WIFI_CLK_EN,
42 wifi_rst_en: WIFI_RST_EN,
43 front_end_mem_pd: FRONT_END_MEM_PD,
44 _reserved39: [u8; 0x0360],
45 date: DATE,
46}
47impl RegisterBlock {
48 #[doc = "0x00 - "]
49 #[inline(always)]
50 pub const fn sysclk_conf(&self) -> &SYSCLK_CONF {
51 &self.sysclk_conf
52 }
53 #[doc = "0x04 - "]
54 #[inline(always)]
55 pub const fn tick_conf(&self) -> &TICK_CONF {
56 &self.tick_conf
57 }
58 #[doc = "0x08 - "]
59 #[inline(always)]
60 pub const fn clk_out_en(&self) -> &CLK_OUT_EN {
61 &self.clk_out_en
62 }
63 #[doc = "0x0c - "]
64 #[inline(always)]
65 pub const fn host_inf_sel(&self) -> &HOST_INF_SEL {
66 &self.host_inf_sel
67 }
68 #[doc = "0x10 - "]
69 #[inline(always)]
70 pub const fn ext_mem_pms_lock(&self) -> &EXT_MEM_PMS_LOCK {
71 &self.ext_mem_pms_lock
72 }
73 #[doc = "0x14 - "]
74 #[inline(always)]
75 pub const fn flash_ace0_attr(&self) -> &FLASH_ACE0_ATTR {
76 &self.flash_ace0_attr
77 }
78 #[doc = "0x18 - "]
79 #[inline(always)]
80 pub const fn flash_ace1_attr(&self) -> &FLASH_ACE1_ATTR {
81 &self.flash_ace1_attr
82 }
83 #[doc = "0x1c - "]
84 #[inline(always)]
85 pub const fn flash_ace2_attr(&self) -> &FLASH_ACE2_ATTR {
86 &self.flash_ace2_attr
87 }
88 #[doc = "0x20 - "]
89 #[inline(always)]
90 pub const fn flash_ace3_attr(&self) -> &FLASH_ACE3_ATTR {
91 &self.flash_ace3_attr
92 }
93 #[doc = "0x24 - "]
94 #[inline(always)]
95 pub const fn flash_ace0_addr(&self) -> &FLASH_ACE0_ADDR {
96 &self.flash_ace0_addr
97 }
98 #[doc = "0x28 - "]
99 #[inline(always)]
100 pub const fn flash_ace1_addr(&self) -> &FLASH_ACE1_ADDR {
101 &self.flash_ace1_addr
102 }
103 #[doc = "0x2c - "]
104 #[inline(always)]
105 pub const fn flash_ace2_addr(&self) -> &FLASH_ACE2_ADDR {
106 &self.flash_ace2_addr
107 }
108 #[doc = "0x30 - "]
109 #[inline(always)]
110 pub const fn flash_ace3_addr(&self) -> &FLASH_ACE3_ADDR {
111 &self.flash_ace3_addr
112 }
113 #[doc = "0x34 - "]
114 #[inline(always)]
115 pub const fn flash_ace0_size(&self) -> &FLASH_ACE0_SIZE {
116 &self.flash_ace0_size
117 }
118 #[doc = "0x38 - "]
119 #[inline(always)]
120 pub const fn flash_ace1_size(&self) -> &FLASH_ACE1_SIZE {
121 &self.flash_ace1_size
122 }
123 #[doc = "0x3c - "]
124 #[inline(always)]
125 pub const fn flash_ace2_size(&self) -> &FLASH_ACE2_SIZE {
126 &self.flash_ace2_size
127 }
128 #[doc = "0x40 - "]
129 #[inline(always)]
130 pub const fn flash_ace3_size(&self) -> &FLASH_ACE3_SIZE {
131 &self.flash_ace3_size
132 }
133 #[doc = "0x44 - "]
134 #[inline(always)]
135 pub const fn sram_ace0_attr(&self) -> &SRAM_ACE0_ATTR {
136 &self.sram_ace0_attr
137 }
138 #[doc = "0x48 - "]
139 #[inline(always)]
140 pub const fn sram_ace1_attr(&self) -> &SRAM_ACE1_ATTR {
141 &self.sram_ace1_attr
142 }
143 #[doc = "0x4c - "]
144 #[inline(always)]
145 pub const fn sram_ace2_attr(&self) -> &SRAM_ACE2_ATTR {
146 &self.sram_ace2_attr
147 }
148 #[doc = "0x50 - "]
149 #[inline(always)]
150 pub const fn sram_ace3_attr(&self) -> &SRAM_ACE3_ATTR {
151 &self.sram_ace3_attr
152 }
153 #[doc = "0x54 - "]
154 #[inline(always)]
155 pub const fn sram_ace0_addr(&self) -> &SRAM_ACE0_ADDR {
156 &self.sram_ace0_addr
157 }
158 #[doc = "0x58 - "]
159 #[inline(always)]
160 pub const fn sram_ace1_addr(&self) -> &SRAM_ACE1_ADDR {
161 &self.sram_ace1_addr
162 }
163 #[doc = "0x5c - "]
164 #[inline(always)]
165 pub const fn sram_ace2_addr(&self) -> &SRAM_ACE2_ADDR {
166 &self.sram_ace2_addr
167 }
168 #[doc = "0x60 - "]
169 #[inline(always)]
170 pub const fn sram_ace3_addr(&self) -> &SRAM_ACE3_ADDR {
171 &self.sram_ace3_addr
172 }
173 #[doc = "0x64 - "]
174 #[inline(always)]
175 pub const fn sram_ace0_size(&self) -> &SRAM_ACE0_SIZE {
176 &self.sram_ace0_size
177 }
178 #[doc = "0x68 - "]
179 #[inline(always)]
180 pub const fn sram_ace1_size(&self) -> &SRAM_ACE1_SIZE {
181 &self.sram_ace1_size
182 }
183 #[doc = "0x6c - "]
184 #[inline(always)]
185 pub const fn sram_ace2_size(&self) -> &SRAM_ACE2_SIZE {
186 &self.sram_ace2_size
187 }
188 #[doc = "0x70 - "]
189 #[inline(always)]
190 pub const fn sram_ace3_size(&self) -> &SRAM_ACE3_SIZE {
191 &self.sram_ace3_size
192 }
193 #[doc = "0x74 - "]
194 #[inline(always)]
195 pub const fn spi_mem_pms_ctrl(&self) -> &SPI_MEM_PMS_CTRL {
196 &self.spi_mem_pms_ctrl
197 }
198 #[doc = "0x78 - "]
199 #[inline(always)]
200 pub const fn spi_mem_reject_addr(&self) -> &SPI_MEM_REJECT_ADDR {
201 &self.spi_mem_reject_addr
202 }
203 #[doc = "0x7c - "]
204 #[inline(always)]
205 pub const fn sdio_ctrl(&self) -> &SDIO_CTRL {
206 &self.sdio_ctrl
207 }
208 #[doc = "0x80 - "]
209 #[inline(always)]
210 pub const fn redcy_sig0(&self) -> &REDCY_SIG0 {
211 &self.redcy_sig0
212 }
213 #[doc = "0x84 - "]
214 #[inline(always)]
215 pub const fn redcy_sig1(&self) -> &REDCY_SIG1 {
216 &self.redcy_sig1
217 }
218 #[doc = "0x88 - "]
219 #[inline(always)]
220 pub const fn wifi_bb_cfg(&self) -> &WIFI_BB_CFG {
221 &self.wifi_bb_cfg
222 }
223 #[doc = "0x8c - "]
224 #[inline(always)]
225 pub const fn wifi_bb_cfg_2(&self) -> &WIFI_BB_CFG_2 {
226 &self.wifi_bb_cfg_2
227 }
228 #[doc = "0x90 - "]
229 #[inline(always)]
230 pub const fn wifi_clk_en(&self) -> &WIFI_CLK_EN {
231 &self.wifi_clk_en
232 }
233 #[doc = "0x94 - "]
234 #[inline(always)]
235 pub const fn wifi_rst_en(&self) -> &WIFI_RST_EN {
236 &self.wifi_rst_en
237 }
238 #[doc = "0x98 - "]
239 #[inline(always)]
240 pub const fn front_end_mem_pd(&self) -> &FRONT_END_MEM_PD {
241 &self.front_end_mem_pd
242 }
243 #[doc = "0x3fc - "]
244 #[inline(always)]
245 pub const fn date(&self) -> &DATE {
246 &self.date
247 }
248}
249#[doc = "SYSCLK_CONF (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`sysclk_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sysclk_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sysclk_conf`] module"]
250pub type SYSCLK_CONF = crate::Reg<sysclk_conf::SYSCLK_CONF_SPEC>;
251#[doc = ""]
252pub mod sysclk_conf;
253#[doc = "TICK_CONF (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`tick_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tick_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tick_conf`] module"]
254pub type TICK_CONF = crate::Reg<tick_conf::TICK_CONF_SPEC>;
255#[doc = ""]
256pub mod tick_conf;
257#[doc = "CLK_OUT_EN (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`clk_out_en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clk_out_en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clk_out_en`] module"]
258pub type CLK_OUT_EN = crate::Reg<clk_out_en::CLK_OUT_EN_SPEC>;
259#[doc = ""]
260pub mod clk_out_en;
261#[doc = "HOST_INF_SEL (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`host_inf_sel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`host_inf_sel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@host_inf_sel`] module"]
262pub type HOST_INF_SEL = crate::Reg<host_inf_sel::HOST_INF_SEL_SPEC>;
263#[doc = ""]
264pub mod host_inf_sel;
265#[doc = "EXT_MEM_PMS_LOCK (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`ext_mem_pms_lock::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ext_mem_pms_lock::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ext_mem_pms_lock`] module"]
266pub type EXT_MEM_PMS_LOCK = crate::Reg<ext_mem_pms_lock::EXT_MEM_PMS_LOCK_SPEC>;
267#[doc = ""]
268pub mod ext_mem_pms_lock;
269#[doc = "FLASH_ACE0_ATTR (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace0_attr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace0_attr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace0_attr`] module"]
270pub type FLASH_ACE0_ATTR = crate::Reg<flash_ace0_attr::FLASH_ACE0_ATTR_SPEC>;
271#[doc = ""]
272pub mod flash_ace0_attr;
273#[doc = "FLASH_ACE1_ATTR (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace1_attr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace1_attr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace1_attr`] module"]
274pub type FLASH_ACE1_ATTR = crate::Reg<flash_ace1_attr::FLASH_ACE1_ATTR_SPEC>;
275#[doc = ""]
276pub mod flash_ace1_attr;
277#[doc = "FLASH_ACE2_ATTR (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace2_attr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace2_attr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace2_attr`] module"]
278pub type FLASH_ACE2_ATTR = crate::Reg<flash_ace2_attr::FLASH_ACE2_ATTR_SPEC>;
279#[doc = ""]
280pub mod flash_ace2_attr;
281#[doc = "FLASH_ACE3_ATTR (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace3_attr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace3_attr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace3_attr`] module"]
282pub type FLASH_ACE3_ATTR = crate::Reg<flash_ace3_attr::FLASH_ACE3_ATTR_SPEC>;
283#[doc = ""]
284pub mod flash_ace3_attr;
285#[doc = "FLASH_ACE0_ADDR (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace0_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace0_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace0_addr`] module"]
286pub type FLASH_ACE0_ADDR = crate::Reg<flash_ace0_addr::FLASH_ACE0_ADDR_SPEC>;
287#[doc = ""]
288pub mod flash_ace0_addr;
289#[doc = "FLASH_ACE1_ADDR (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace1_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace1_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace1_addr`] module"]
290pub type FLASH_ACE1_ADDR = crate::Reg<flash_ace1_addr::FLASH_ACE1_ADDR_SPEC>;
291#[doc = ""]
292pub mod flash_ace1_addr;
293#[doc = "FLASH_ACE2_ADDR (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace2_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace2_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace2_addr`] module"]
294pub type FLASH_ACE2_ADDR = crate::Reg<flash_ace2_addr::FLASH_ACE2_ADDR_SPEC>;
295#[doc = ""]
296pub mod flash_ace2_addr;
297#[doc = "FLASH_ACE3_ADDR (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace3_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace3_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace3_addr`] module"]
298pub type FLASH_ACE3_ADDR = crate::Reg<flash_ace3_addr::FLASH_ACE3_ADDR_SPEC>;
299#[doc = ""]
300pub mod flash_ace3_addr;
301#[doc = "FLASH_ACE0_SIZE (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace0_size::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace0_size::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace0_size`] module"]
302pub type FLASH_ACE0_SIZE = crate::Reg<flash_ace0_size::FLASH_ACE0_SIZE_SPEC>;
303#[doc = ""]
304pub mod flash_ace0_size;
305#[doc = "FLASH_ACE1_SIZE (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace1_size::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace1_size::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace1_size`] module"]
306pub type FLASH_ACE1_SIZE = crate::Reg<flash_ace1_size::FLASH_ACE1_SIZE_SPEC>;
307#[doc = ""]
308pub mod flash_ace1_size;
309#[doc = "FLASH_ACE2_SIZE (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace2_size::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace2_size::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace2_size`] module"]
310pub type FLASH_ACE2_SIZE = crate::Reg<flash_ace2_size::FLASH_ACE2_SIZE_SPEC>;
311#[doc = ""]
312pub mod flash_ace2_size;
313#[doc = "FLASH_ACE3_SIZE (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace3_size::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace3_size::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace3_size`] module"]
314pub type FLASH_ACE3_SIZE = crate::Reg<flash_ace3_size::FLASH_ACE3_SIZE_SPEC>;
315#[doc = ""]
316pub mod flash_ace3_size;
317#[doc = "SRAM_ACE0_ATTR (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`sram_ace0_attr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sram_ace0_attr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sram_ace0_attr`] module"]
318pub type SRAM_ACE0_ATTR = crate::Reg<sram_ace0_attr::SRAM_ACE0_ATTR_SPEC>;
319#[doc = ""]
320pub mod sram_ace0_attr;
321#[doc = "SRAM_ACE1_ATTR (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`sram_ace1_attr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sram_ace1_attr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sram_ace1_attr`] module"]
322pub type SRAM_ACE1_ATTR = crate::Reg<sram_ace1_attr::SRAM_ACE1_ATTR_SPEC>;
323#[doc = ""]
324pub mod sram_ace1_attr;
325#[doc = "SRAM_ACE2_ATTR (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`sram_ace2_attr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sram_ace2_attr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sram_ace2_attr`] module"]
326pub type SRAM_ACE2_ATTR = crate::Reg<sram_ace2_attr::SRAM_ACE2_ATTR_SPEC>;
327#[doc = ""]
328pub mod sram_ace2_attr;
329#[doc = "SRAM_ACE3_ATTR (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`sram_ace3_attr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sram_ace3_attr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sram_ace3_attr`] module"]
330pub type SRAM_ACE3_ATTR = crate::Reg<sram_ace3_attr::SRAM_ACE3_ATTR_SPEC>;
331#[doc = ""]
332pub mod sram_ace3_attr;
333#[doc = "SRAM_ACE0_ADDR (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`sram_ace0_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sram_ace0_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sram_ace0_addr`] module"]
334pub type SRAM_ACE0_ADDR = crate::Reg<sram_ace0_addr::SRAM_ACE0_ADDR_SPEC>;
335#[doc = ""]
336pub mod sram_ace0_addr;
337#[doc = "SRAM_ACE1_ADDR (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`sram_ace1_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sram_ace1_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sram_ace1_addr`] module"]
338pub type SRAM_ACE1_ADDR = crate::Reg<sram_ace1_addr::SRAM_ACE1_ADDR_SPEC>;
339#[doc = ""]
340pub mod sram_ace1_addr;
341#[doc = "SRAM_ACE2_ADDR (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`sram_ace2_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sram_ace2_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sram_ace2_addr`] module"]
342pub type SRAM_ACE2_ADDR = crate::Reg<sram_ace2_addr::SRAM_ACE2_ADDR_SPEC>;
343#[doc = ""]
344pub mod sram_ace2_addr;
345#[doc = "SRAM_ACE3_ADDR (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`sram_ace3_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sram_ace3_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sram_ace3_addr`] module"]
346pub type SRAM_ACE3_ADDR = crate::Reg<sram_ace3_addr::SRAM_ACE3_ADDR_SPEC>;
347#[doc = ""]
348pub mod sram_ace3_addr;
349#[doc = "SRAM_ACE0_SIZE (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`sram_ace0_size::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sram_ace0_size::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sram_ace0_size`] module"]
350pub type SRAM_ACE0_SIZE = crate::Reg<sram_ace0_size::SRAM_ACE0_SIZE_SPEC>;
351#[doc = ""]
352pub mod sram_ace0_size;
353#[doc = "SRAM_ACE1_SIZE (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`sram_ace1_size::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sram_ace1_size::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sram_ace1_size`] module"]
354pub type SRAM_ACE1_SIZE = crate::Reg<sram_ace1_size::SRAM_ACE1_SIZE_SPEC>;
355#[doc = ""]
356pub mod sram_ace1_size;
357#[doc = "SRAM_ACE2_SIZE (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`sram_ace2_size::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sram_ace2_size::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sram_ace2_size`] module"]
358pub type SRAM_ACE2_SIZE = crate::Reg<sram_ace2_size::SRAM_ACE2_SIZE_SPEC>;
359#[doc = ""]
360pub mod sram_ace2_size;
361#[doc = "SRAM_ACE3_SIZE (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`sram_ace3_size::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sram_ace3_size::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sram_ace3_size`] module"]
362pub type SRAM_ACE3_SIZE = crate::Reg<sram_ace3_size::SRAM_ACE3_SIZE_SPEC>;
363#[doc = ""]
364pub mod sram_ace3_size;
365#[doc = "SPI_MEM_PMS_CTRL (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`spi_mem_pms_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spi_mem_pms_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_mem_pms_ctrl`] module"]
366pub type SPI_MEM_PMS_CTRL = crate::Reg<spi_mem_pms_ctrl::SPI_MEM_PMS_CTRL_SPEC>;
367#[doc = ""]
368pub mod spi_mem_pms_ctrl;
369#[doc = "SPI_MEM_REJECT_ADDR (r) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`spi_mem_reject_addr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_mem_reject_addr`] module"]
370pub type SPI_MEM_REJECT_ADDR = crate::Reg<spi_mem_reject_addr::SPI_MEM_REJECT_ADDR_SPEC>;
371#[doc = ""]
372pub mod spi_mem_reject_addr;
373#[doc = "SDIO_CTRL (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`sdio_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sdio_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdio_ctrl`] module"]
374pub type SDIO_CTRL = crate::Reg<sdio_ctrl::SDIO_CTRL_SPEC>;
375#[doc = ""]
376pub mod sdio_ctrl;
377#[doc = "REDCY_SIG0 (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`redcy_sig0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`redcy_sig0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@redcy_sig0`] module"]
378pub type REDCY_SIG0 = crate::Reg<redcy_sig0::REDCY_SIG0_SPEC>;
379#[doc = ""]
380pub mod redcy_sig0;
381#[doc = "REDCY_SIG1 (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`redcy_sig1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`redcy_sig1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@redcy_sig1`] module"]
382pub type REDCY_SIG1 = crate::Reg<redcy_sig1::REDCY_SIG1_SPEC>;
383#[doc = ""]
384pub mod redcy_sig1;
385#[doc = "WIFI_BB_CFG (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`wifi_bb_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wifi_bb_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wifi_bb_cfg`] module"]
386pub type WIFI_BB_CFG = crate::Reg<wifi_bb_cfg::WIFI_BB_CFG_SPEC>;
387#[doc = ""]
388pub mod wifi_bb_cfg;
389#[doc = "WIFI_BB_CFG_2 (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`wifi_bb_cfg_2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wifi_bb_cfg_2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wifi_bb_cfg_2`] module"]
390pub type WIFI_BB_CFG_2 = crate::Reg<wifi_bb_cfg_2::WIFI_BB_CFG_2_SPEC>;
391#[doc = ""]
392pub mod wifi_bb_cfg_2;
393#[doc = "WIFI_CLK_EN (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`wifi_clk_en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wifi_clk_en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wifi_clk_en`] module"]
394pub type WIFI_CLK_EN = crate::Reg<wifi_clk_en::WIFI_CLK_EN_SPEC>;
395#[doc = ""]
396pub mod wifi_clk_en;
397#[doc = "WIFI_RST_EN (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`wifi_rst_en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wifi_rst_en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wifi_rst_en`] module"]
398pub type WIFI_RST_EN = crate::Reg<wifi_rst_en::WIFI_RST_EN_SPEC>;
399#[doc = ""]
400pub mod wifi_rst_en;
401#[doc = "FRONT_END_MEM_PD (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`front_end_mem_pd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`front_end_mem_pd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@front_end_mem_pd`] module"]
402pub type FRONT_END_MEM_PD = crate::Reg<front_end_mem_pd::FRONT_END_MEM_PD_SPEC>;
403#[doc = ""]
404pub mod front_end_mem_pd;
405#[doc = "DATE (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
406pub type DATE = crate::Reg<date::DATE_SPEC>;
407#[doc = ""]
408pub mod date;