esp32s2/i2s0/
lc_state1.rs

1#[doc = "Register `LC_STATE1` reader"]
2pub type R = crate::R<LC_STATE1_SPEC>;
3#[doc = "Field `INLINK_DSCR_ADDR` reader - I2S DMA in descriptor address."]
4pub type INLINK_DSCR_ADDR_R = crate::FieldReader<u32>;
5#[doc = "Field `IN_DSCR_STATE` reader - I2S DMA in descriptor state."]
6pub type IN_DSCR_STATE_R = crate::FieldReader;
7#[doc = "Field `IN_STATE` reader - I2S DMA in data state."]
8pub type IN_STATE_R = crate::FieldReader;
9#[doc = "Field `INFIFO_CNT_DEBUG` reader - The remains of I2S DMA infifo data."]
10pub type INFIFO_CNT_DEBUG_R = crate::FieldReader;
11#[doc = "Field `IN_FULL` reader - I2S DMA infifo is full."]
12pub type IN_FULL_R = crate::BitReader;
13#[doc = "Field `IN_EMPTY` reader - I2S DMA infifo is empty."]
14pub type IN_EMPTY_R = crate::BitReader;
15impl R {
16    #[doc = "Bits 0:17 - I2S DMA in descriptor address."]
17    #[inline(always)]
18    pub fn inlink_dscr_addr(&self) -> INLINK_DSCR_ADDR_R {
19        INLINK_DSCR_ADDR_R::new(self.bits & 0x0003_ffff)
20    }
21    #[doc = "Bits 18:19 - I2S DMA in descriptor state."]
22    #[inline(always)]
23    pub fn in_dscr_state(&self) -> IN_DSCR_STATE_R {
24        IN_DSCR_STATE_R::new(((self.bits >> 18) & 3) as u8)
25    }
26    #[doc = "Bits 20:22 - I2S DMA in data state."]
27    #[inline(always)]
28    pub fn in_state(&self) -> IN_STATE_R {
29        IN_STATE_R::new(((self.bits >> 20) & 7) as u8)
30    }
31    #[doc = "Bits 23:29 - The remains of I2S DMA infifo data."]
32    #[inline(always)]
33    pub fn infifo_cnt_debug(&self) -> INFIFO_CNT_DEBUG_R {
34        INFIFO_CNT_DEBUG_R::new(((self.bits >> 23) & 0x7f) as u8)
35    }
36    #[doc = "Bit 30 - I2S DMA infifo is full."]
37    #[inline(always)]
38    pub fn in_full(&self) -> IN_FULL_R {
39        IN_FULL_R::new(((self.bits >> 30) & 1) != 0)
40    }
41    #[doc = "Bit 31 - I2S DMA infifo is empty."]
42    #[inline(always)]
43    pub fn in_empty(&self) -> IN_EMPTY_R {
44        IN_EMPTY_R::new(((self.bits >> 31) & 1) != 0)
45    }
46}
47#[cfg(feature = "impl-register-debug")]
48impl core::fmt::Debug for R {
49    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
50        f.debug_struct("LC_STATE1")
51            .field("inlink_dscr_addr", &self.inlink_dscr_addr())
52            .field("in_dscr_state", &self.in_dscr_state())
53            .field("in_state", &self.in_state())
54            .field("infifo_cnt_debug", &self.infifo_cnt_debug())
55            .field("in_full", &self.in_full())
56            .field("in_empty", &self.in_empty())
57            .finish()
58    }
59}
60#[doc = "I2S DMA RX status\n\nYou can [`read`](crate::Reg::read) this register and get [`lc_state1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
61pub struct LC_STATE1_SPEC;
62impl crate::RegisterSpec for LC_STATE1_SPEC {
63    type Ux = u32;
64}
65#[doc = "`read()` method returns [`lc_state1::R`](R) reader structure"]
66impl crate::Readable for LC_STATE1_SPEC {}
67#[doc = "`reset()` method sets LC_STATE1 to value 0"]
68impl crate::Resettable for LC_STATE1_SPEC {
69    const RESET_VALUE: u32 = 0;
70}
esp32s2/i2s0/lc_state1.rs

esp32s2/i2s0/
lc_state1.rs
