1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 conf: CONF,
6 int_raw: INT_RAW,
7 int_st: INT_ST,
8 int_ena: INT_ENA,
9 int_clr: INT_CLR,
10 out_status: OUT_STATUS,
11 _reserved6: [u8; 0x04],
12 in_status: IN_STATUS,
13 _reserved7: [u8; 0x04],
14 out_link: OUT_LINK,
15 in_link: IN_LINK,
16 conf1: CONF1,
17 state0: STATE0,
18 state1: STATE1,
19 out_eof_des_addr: OUT_EOF_DES_ADDR,
20 in_suc_eof_des_addr: IN_SUC_EOF_DES_ADDR,
21 in_err_eof_des_addr: IN_ERR_EOF_DES_ADDR,
22 out_eof_bfr_des_addr: OUT_EOF_BFR_DES_ADDR,
23 ahb_test: AHB_TEST,
24 dma_in_dscr: DMA_IN_DSCR,
25 dma_in_dscr_bf0: DMA_IN_DSCR_BF0,
26 _reserved19: [u8; 0x04],
27 dma_out_dscr: DMA_OUT_DSCR,
28 dma_out_dscr_bf0: DMA_OUT_DSCR_BF0,
29 _reserved21: [u8; 0x04],
30 aes_sha_select: AES_SHA_SELECT,
31 pd_conf: PD_CONF,
32 _reserved23: [u8; 0x90],
33 date: DATE,
34}
35impl RegisterBlock {
36 #[doc = "0x00 - DMA configuration register"]
37 #[inline(always)]
38 pub const fn conf(&self) -> &CONF {
39 &self.conf
40 }
41 #[doc = "0x04 - Raw interrupt status"]
42 #[inline(always)]
43 pub const fn int_raw(&self) -> &INT_RAW {
44 &self.int_raw
45 }
46 #[doc = "0x08 - Masked interrupt status"]
47 #[inline(always)]
48 pub const fn int_st(&self) -> &INT_ST {
49 &self.int_st
50 }
51 #[doc = "0x0c - Interrupt enable bits"]
52 #[inline(always)]
53 pub const fn int_ena(&self) -> &INT_ENA {
54 &self.int_ena
55 }
56 #[doc = "0x10 - Interrupt clear bits"]
57 #[inline(always)]
58 pub const fn int_clr(&self) -> &INT_CLR {
59 &self.int_clr
60 }
61 #[doc = "0x14 - TX FIFO status register"]
62 #[inline(always)]
63 pub const fn out_status(&self) -> &OUT_STATUS {
64 &self.out_status
65 }
66 #[doc = "0x1c - RX FIFO status register"]
67 #[inline(always)]
68 pub const fn in_status(&self) -> &IN_STATUS {
69 &self.in_status
70 }
71 #[doc = "0x24 - Link descriptor address and control"]
72 #[inline(always)]
73 pub const fn out_link(&self) -> &OUT_LINK {
74 &self.out_link
75 }
76 #[doc = "0x28 - Link descriptor address and control"]
77 #[inline(always)]
78 pub const fn in_link(&self) -> &IN_LINK {
79 &self.in_link
80 }
81 #[doc = "0x2c - DMA configuration register"]
82 #[inline(always)]
83 pub const fn conf1(&self) -> &CONF1 {
84 &self.conf1
85 }
86 #[doc = "0x30 - Status register of receiving data"]
87 #[inline(always)]
88 pub const fn state0(&self) -> &STATE0 {
89 &self.state0
90 }
91 #[doc = "0x34 - Status register of transmitting data"]
92 #[inline(always)]
93 pub const fn state1(&self) -> &STATE1 {
94 &self.state1
95 }
96 #[doc = "0x38 - Transmit descriptor address when EOF occurs"]
97 #[inline(always)]
98 pub const fn out_eof_des_addr(&self) -> &OUT_EOF_DES_ADDR {
99 &self.out_eof_des_addr
100 }
101 #[doc = "0x3c - Receive descriptor address when EOF occurs"]
102 #[inline(always)]
103 pub const fn in_suc_eof_des_addr(&self) -> &IN_SUC_EOF_DES_ADDR {
104 &self.in_suc_eof_des_addr
105 }
106 #[doc = "0x40 - Receive descriptor address when errors occur"]
107 #[inline(always)]
108 pub const fn in_err_eof_des_addr(&self) -> &IN_ERR_EOF_DES_ADDR {
109 &self.in_err_eof_des_addr
110 }
111 #[doc = "0x44 - Transmit descriptor address before the last transmit descriptor"]
112 #[inline(always)]
113 pub const fn out_eof_bfr_des_addr(&self) -> &OUT_EOF_BFR_DES_ADDR {
114 &self.out_eof_bfr_des_addr
115 }
116 #[doc = "0x48 - AHB test register"]
117 #[inline(always)]
118 pub const fn ahb_test(&self) -> &AHB_TEST {
119 &self.ahb_test
120 }
121 #[doc = "0x4c - Address of current receive descriptor"]
122 #[inline(always)]
123 pub const fn dma_in_dscr(&self) -> &DMA_IN_DSCR {
124 &self.dma_in_dscr
125 }
126 #[doc = "0x50 - Address of last receive descriptor"]
127 #[inline(always)]
128 pub const fn dma_in_dscr_bf0(&self) -> &DMA_IN_DSCR_BF0 {
129 &self.dma_in_dscr_bf0
130 }
131 #[doc = "0x58 - Address of current transmit descriptor"]
132 #[inline(always)]
133 pub const fn dma_out_dscr(&self) -> &DMA_OUT_DSCR {
134 &self.dma_out_dscr
135 }
136 #[doc = "0x5c - Address of last transmit descriptor"]
137 #[inline(always)]
138 pub const fn dma_out_dscr_bf0(&self) -> &DMA_OUT_DSCR_BF0 {
139 &self.dma_out_dscr_bf0
140 }
141 #[doc = "0x64 - AES/SHA select register"]
142 #[inline(always)]
143 pub const fn aes_sha_select(&self) -> &AES_SHA_SELECT {
144 &self.aes_sha_select
145 }
146 #[doc = "0x68 - Power control register"]
147 #[inline(always)]
148 pub const fn pd_conf(&self) -> &PD_CONF {
149 &self.pd_conf
150 }
151 #[doc = "0xfc - Crypto DMA version control register"]
152 #[inline(always)]
153 pub const fn date(&self) -> &DATE {
154 &self.date
155 }
156}
157#[doc = "CONF (rw) register accessor: DMA configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@conf`] module"]
158pub type CONF = crate::Reg<conf::CONF_SPEC>;
159#[doc = "DMA configuration register"]
160pub mod conf;
161#[doc = "OUT_LINK (rw) register accessor: Link descriptor address and control\n\nYou can [`read`](crate::Reg::read) this register and get [`out_link::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`out_link::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out_link`] module"]
162pub type OUT_LINK = crate::Reg<out_link::OUT_LINK_SPEC>;
163#[doc = "Link descriptor address and control"]
164pub mod out_link;
165#[doc = "IN_LINK (rw) register accessor: Link descriptor address and control\n\nYou can [`read`](crate::Reg::read) this register and get [`in_link::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`in_link::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_link`] module"]
166pub type IN_LINK = crate::Reg<in_link::IN_LINK_SPEC>;
167#[doc = "Link descriptor address and control"]
168pub mod in_link;
169#[doc = "CONF1 (rw) register accessor: DMA configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`conf1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`conf1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@conf1`] module"]
170pub type CONF1 = crate::Reg<conf1::CONF1_SPEC>;
171#[doc = "DMA configuration register"]
172pub mod conf1;
173#[doc = "AHB_TEST (rw) register accessor: AHB test register\n\nYou can [`read`](crate::Reg::read) this register and get [`ahb_test::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ahb_test::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ahb_test`] module"]
174pub type AHB_TEST = crate::Reg<ahb_test::AHB_TEST_SPEC>;
175#[doc = "AHB test register"]
176pub mod ahb_test;
177#[doc = "AES_SHA_SELECT (rw) register accessor: AES/SHA select register\n\nYou can [`read`](crate::Reg::read) this register and get [`aes_sha_select::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`aes_sha_select::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@aes_sha_select`] module"]
178pub type AES_SHA_SELECT = crate::Reg<aes_sha_select::AES_SHA_SELECT_SPEC>;
179#[doc = "AES/SHA select register"]
180pub mod aes_sha_select;
181#[doc = "PD_CONF (rw) register accessor: Power control register\n\nYou can [`read`](crate::Reg::read) this register and get [`pd_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pd_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pd_conf`] module"]
182pub type PD_CONF = crate::Reg<pd_conf::PD_CONF_SPEC>;
183#[doc = "Power control register"]
184pub mod pd_conf;
185#[doc = "DATE (rw) register accessor: Crypto DMA version control register\n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
186pub type DATE = crate::Reg<date::DATE_SPEC>;
187#[doc = "Crypto DMA version control register"]
188pub mod date;
189#[doc = "INT_RAW (r) register accessor: Raw interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`int_raw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_raw`] module"]
190pub type INT_RAW = crate::Reg<int_raw::INT_RAW_SPEC>;
191#[doc = "Raw interrupt status"]
192pub mod int_raw;
193#[doc = "INT_ST (r) register accessor: Masked interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`int_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_st`] module"]
194pub type INT_ST = crate::Reg<int_st::INT_ST_SPEC>;
195#[doc = "Masked interrupt status"]
196pub mod int_st;
197#[doc = "INT_ENA (rw) register accessor: Interrupt enable bits\n\nYou can [`read`](crate::Reg::read) this register and get [`int_ena::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_ena::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_ena`] module"]
198pub type INT_ENA = crate::Reg<int_ena::INT_ENA_SPEC>;
199#[doc = "Interrupt enable bits"]
200pub mod int_ena;
201#[doc = "INT_CLR (w) register accessor: Interrupt clear bits\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_clr`] module"]
202pub type INT_CLR = crate::Reg<int_clr::INT_CLR_SPEC>;
203#[doc = "Interrupt clear bits"]
204pub mod int_clr;
205#[doc = "OUT_STATUS (r) register accessor: TX FIFO status register\n\nYou can [`read`](crate::Reg::read) this register and get [`out_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out_status`] module"]
206pub type OUT_STATUS = crate::Reg<out_status::OUT_STATUS_SPEC>;
207#[doc = "TX FIFO status register"]
208pub mod out_status;
209#[doc = "IN_STATUS (r) register accessor: RX FIFO status register\n\nYou can [`read`](crate::Reg::read) this register and get [`in_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_status`] module"]
210pub type IN_STATUS = crate::Reg<in_status::IN_STATUS_SPEC>;
211#[doc = "RX FIFO status register"]
212pub mod in_status;
213#[doc = "STATE0 (r) register accessor: Status register of receiving data\n\nYou can [`read`](crate::Reg::read) this register and get [`state0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@state0`] module"]
214pub type STATE0 = crate::Reg<state0::STATE0_SPEC>;
215#[doc = "Status register of receiving data"]
216pub mod state0;
217#[doc = "STATE1 (r) register accessor: Status register of transmitting data\n\nYou can [`read`](crate::Reg::read) this register and get [`state1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@state1`] module"]
218pub type STATE1 = crate::Reg<state1::STATE1_SPEC>;
219#[doc = "Status register of transmitting data"]
220pub mod state1;
221#[doc = "OUT_EOF_DES_ADDR (r) register accessor: Transmit descriptor address when EOF occurs\n\nYou can [`read`](crate::Reg::read) this register and get [`out_eof_des_addr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out_eof_des_addr`] module"]
222pub type OUT_EOF_DES_ADDR = crate::Reg<out_eof_des_addr::OUT_EOF_DES_ADDR_SPEC>;
223#[doc = "Transmit descriptor address when EOF occurs"]
224pub mod out_eof_des_addr;
225#[doc = "IN_SUC_EOF_DES_ADDR (r) register accessor: Receive descriptor address when EOF occurs\n\nYou can [`read`](crate::Reg::read) this register and get [`in_suc_eof_des_addr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_suc_eof_des_addr`] module"]
226pub type IN_SUC_EOF_DES_ADDR = crate::Reg<in_suc_eof_des_addr::IN_SUC_EOF_DES_ADDR_SPEC>;
227#[doc = "Receive descriptor address when EOF occurs"]
228pub mod in_suc_eof_des_addr;
229#[doc = "IN_ERR_EOF_DES_ADDR (r) register accessor: Receive descriptor address when errors occur\n\nYou can [`read`](crate::Reg::read) this register and get [`in_err_eof_des_addr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_err_eof_des_addr`] module"]
230pub type IN_ERR_EOF_DES_ADDR = crate::Reg<in_err_eof_des_addr::IN_ERR_EOF_DES_ADDR_SPEC>;
231#[doc = "Receive descriptor address when errors occur"]
232pub mod in_err_eof_des_addr;
233#[doc = "OUT_EOF_BFR_DES_ADDR (r) register accessor: Transmit descriptor address before the last transmit descriptor\n\nYou can [`read`](crate::Reg::read) this register and get [`out_eof_bfr_des_addr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out_eof_bfr_des_addr`] module"]
234pub type OUT_EOF_BFR_DES_ADDR = crate::Reg<out_eof_bfr_des_addr::OUT_EOF_BFR_DES_ADDR_SPEC>;
235#[doc = "Transmit descriptor address before the last transmit descriptor"]
236pub mod out_eof_bfr_des_addr;
237#[doc = "DMA_IN_DSCR (r) register accessor: Address of current receive descriptor\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_in_dscr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_in_dscr`] module"]
238pub type DMA_IN_DSCR = crate::Reg<dma_in_dscr::DMA_IN_DSCR_SPEC>;
239#[doc = "Address of current receive descriptor"]
240pub mod dma_in_dscr;
241#[doc = "DMA_IN_DSCR_BF0 (r) register accessor: Address of last receive descriptor\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_in_dscr_bf0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_in_dscr_bf0`] module"]
242pub type DMA_IN_DSCR_BF0 = crate::Reg<dma_in_dscr_bf0::DMA_IN_DSCR_BF0_SPEC>;
243#[doc = "Address of last receive descriptor"]
244pub mod dma_in_dscr_bf0;
245#[doc = "DMA_OUT_DSCR (r) register accessor: Address of current transmit descriptor\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_out_dscr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_out_dscr`] module"]
246pub type DMA_OUT_DSCR = crate::Reg<dma_out_dscr::DMA_OUT_DSCR_SPEC>;
247#[doc = "Address of current transmit descriptor"]
248pub mod dma_out_dscr;
249#[doc = "DMA_OUT_DSCR_BF0 (r) register accessor: Address of last transmit descriptor\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_out_dscr_bf0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_out_dscr_bf0`] module"]
250pub type DMA_OUT_DSCR_BF0 = crate::Reg<dma_out_dscr_bf0::DMA_OUT_DSCR_BF0_SPEC>;
251#[doc = "Address of last transmit descriptor"]
252pub mod dma_out_dscr_bf0;