esp32s2/spi0/
dma_instatus.rs1#[doc = "Register `DMA_INSTATUS` reader"]
2pub type R = crate::R<DMA_INSTATUS_SPEC>;
3#[doc = "Field `DMA_INDSCR_ADDR` reader - SPI dma in descriptor address."]
4pub type DMA_INDSCR_ADDR_R = crate::FieldReader<u32>;
5#[doc = "Field `DMA_INDSCR_STATE` reader - SPI dma in descriptor state."]
6pub type DMA_INDSCR_STATE_R = crate::FieldReader;
7#[doc = "Field `DMA_IN_STATE` reader - SPI dma in data state."]
8pub type DMA_IN_STATE_R = crate::FieldReader;
9#[doc = "Field `DMA_INFIFO_CNT` reader - The remains of SPI dma infifo data."]
10pub type DMA_INFIFO_CNT_R = crate::FieldReader;
11#[doc = "Field `DMA_INFIFO_FULL` reader - SPI dma infifo is full."]
12pub type DMA_INFIFO_FULL_R = crate::BitReader;
13#[doc = "Field `DMA_INFIFO_EMPTY` reader - SPI dma infifo is empty."]
14pub type DMA_INFIFO_EMPTY_R = crate::BitReader;
15impl R {
16 #[doc = "Bits 0:17 - SPI dma in descriptor address."]
17 #[inline(always)]
18 pub fn dma_indscr_addr(&self) -> DMA_INDSCR_ADDR_R {
19 DMA_INDSCR_ADDR_R::new(self.bits & 0x0003_ffff)
20 }
21 #[doc = "Bits 18:19 - SPI dma in descriptor state."]
22 #[inline(always)]
23 pub fn dma_indscr_state(&self) -> DMA_INDSCR_STATE_R {
24 DMA_INDSCR_STATE_R::new(((self.bits >> 18) & 3) as u8)
25 }
26 #[doc = "Bits 20:22 - SPI dma in data state."]
27 #[inline(always)]
28 pub fn dma_in_state(&self) -> DMA_IN_STATE_R {
29 DMA_IN_STATE_R::new(((self.bits >> 20) & 7) as u8)
30 }
31 #[doc = "Bits 23:29 - The remains of SPI dma infifo data."]
32 #[inline(always)]
33 pub fn dma_infifo_cnt(&self) -> DMA_INFIFO_CNT_R {
34 DMA_INFIFO_CNT_R::new(((self.bits >> 23) & 0x7f) as u8)
35 }
36 #[doc = "Bit 30 - SPI dma infifo is full."]
37 #[inline(always)]
38 pub fn dma_infifo_full(&self) -> DMA_INFIFO_FULL_R {
39 DMA_INFIFO_FULL_R::new(((self.bits >> 30) & 1) != 0)
40 }
41 #[doc = "Bit 31 - SPI dma infifo is empty."]
42 #[inline(always)]
43 pub fn dma_infifo_empty(&self) -> DMA_INFIFO_EMPTY_R {
44 DMA_INFIFO_EMPTY_R::new(((self.bits >> 31) & 1) != 0)
45 }
46}
47#[cfg(feature = "impl-register-debug")]
48impl core::fmt::Debug for R {
49 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
50 f.debug_struct("DMA_INSTATUS")
51 .field("dma_indscr_addr", &self.dma_indscr_addr())
52 .field("dma_indscr_state", &self.dma_indscr_state())
53 .field("dma_in_state", &self.dma_in_state())
54 .field("dma_infifo_cnt", &self.dma_infifo_cnt())
55 .field("dma_infifo_full", &self.dma_infifo_full())
56 .field("dma_infifo_empty", &self.dma_infifo_empty())
57 .finish()
58 }
59}
60#[doc = "SPI DMA RX status\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_instatus::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
61pub struct DMA_INSTATUS_SPEC;
62impl crate::RegisterSpec for DMA_INSTATUS_SPEC {
63 type Ux = u32;
64}
65#[doc = "`read()` method returns [`dma_instatus::R`](R) reader structure"]
66impl crate::Readable for DMA_INSTATUS_SPEC {}
67#[doc = "`reset()` method sets DMA_INSTATUS to value 0x8000_0000"]
68impl crate::Resettable for DMA_INSTATUS_SPEC {
69 const RESET_VALUE: u32 = 0x8000_0000;
70}