esp32s2/
pms.rs

1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5    sdio_0: SDIO_0,
6    sdio_1: SDIO_1,
7    mac_dump_0: MAC_DUMP_0,
8    mac_dump_1: MAC_DUMP_1,
9    pro_iram0_0: PRO_IRAM0_0,
10    pro_iram0_1: PRO_IRAM0_1,
11    pro_iram0_2: PRO_IRAM0_2,
12    pro_iram0_3: PRO_IRAM0_3,
13    pro_iram0_4: PRO_IRAM0_4,
14    pro_iram0_5: PRO_IRAM0_5,
15    pro_dram0_0: PRO_DRAM0_0,
16    pro_dram0_1: PRO_DRAM0_1,
17    pro_dram0_2: PRO_DRAM0_2,
18    pro_dram0_3: PRO_DRAM0_3,
19    pro_dram0_4: PRO_DRAM0_4,
20    pro_dport_0: PRO_DPORT_0,
21    pro_dport_1: PRO_DPORT_1,
22    pro_dport_2: PRO_DPORT_2,
23    pro_dport_3: PRO_DPORT_3,
24    pro_dport_4: PRO_DPORT_4,
25    pro_dport_5: PRO_DPORT_5,
26    pro_dport_6: PRO_DPORT_6,
27    pro_dport_7: PRO_DPORT_7,
28    pro_ahb_0: PRO_AHB_0,
29    pro_ahb_1: PRO_AHB_1,
30    pro_ahb_2: PRO_AHB_2,
31    pro_ahb_3: PRO_AHB_3,
32    pro_ahb_4: PRO_AHB_4,
33    pro_trace_0: PRO_TRACE_0,
34    pro_trace_1: PRO_TRACE_1,
35    pro_cache_0: PRO_CACHE_0,
36    pro_cache_1: PRO_CACHE_1,
37    pro_cache_2: PRO_CACHE_2,
38    pro_cache_3: PRO_CACHE_3,
39    pro_cache_4: PRO_CACHE_4,
40    dma_apb_i_0: DMA_APB_I_0,
41    dma_apb_i_1: DMA_APB_I_1,
42    dma_apb_i_2: DMA_APB_I_2,
43    dma_apb_i_3: DMA_APB_I_3,
44    dma_rx_i_0: DMA_RX_I_0,
45    dma_rx_i_1: DMA_RX_I_1,
46    dma_rx_i_2: DMA_RX_I_2,
47    dma_rx_i_3: DMA_RX_I_3,
48    dma_tx_i_0: DMA_TX_I_0,
49    dma_tx_i_1: DMA_TX_I_1,
50    dma_tx_i_2: DMA_TX_I_2,
51    dma_tx_i_3: DMA_TX_I_3,
52    pro_boot_location_0: PRO_BOOT_LOCATION_0,
53    pro_boot_location_1: PRO_BOOT_LOCATION_1,
54    cache_source_0: CACHE_SOURCE_0,
55    cache_source_1: CACHE_SOURCE_1,
56    apb_peripheral_0: APB_PERIPHERAL_0,
57    apb_peripheral_1: APB_PERIPHERAL_1,
58    occupy_0: OCCUPY_0,
59    occupy_1: OCCUPY_1,
60    occupy_2: OCCUPY_2,
61    occupy_3: OCCUPY_3,
62    cache_tag_access_0: CACHE_TAG_ACCESS_0,
63    cache_tag_access_1: CACHE_TAG_ACCESS_1,
64    cache_mmu_access_0: CACHE_MMU_ACCESS_0,
65    cache_mmu_access_1: CACHE_MMU_ACCESS_1,
66    apb_peripheral_intr: APB_PERIPHERAL_INTR,
67    apb_peripheral_status: APB_PERIPHERAL_STATUS,
68    cpu_peripheral_intr: CPU_PERIPHERAL_INTR,
69    cpu_peripheral_status: CPU_PERIPHERAL_STATUS,
70    clock_gate: CLOCK_GATE,
71    _reserved66: [u8; 0x0ef4],
72    date: DATE,
73}
74impl RegisterBlock {
75    #[doc = "0x00 - SDIO permission control register 0."]
76    #[inline(always)]
77    pub const fn sdio_0(&self) -> &SDIO_0 {
78        &self.sdio_0
79    }
80    #[doc = "0x04 - SDIO permission control register 1."]
81    #[inline(always)]
82    pub const fn sdio_1(&self) -> &SDIO_1 {
83        &self.sdio_1
84    }
85    #[doc = "0x08 - MAC dump permission control register 0."]
86    #[inline(always)]
87    pub const fn mac_dump_0(&self) -> &MAC_DUMP_0 {
88        &self.mac_dump_0
89    }
90    #[doc = "0x0c - MAC dump permission control register 1."]
91    #[inline(always)]
92    pub const fn mac_dump_1(&self) -> &MAC_DUMP_1 {
93        &self.mac_dump_1
94    }
95    #[doc = "0x10 - IBUS permission control register 0."]
96    #[inline(always)]
97    pub const fn pro_iram0_0(&self) -> &PRO_IRAM0_0 {
98        &self.pro_iram0_0
99    }
100    #[doc = "0x14 - IBUS permission control register 1."]
101    #[inline(always)]
102    pub const fn pro_iram0_1(&self) -> &PRO_IRAM0_1 {
103        &self.pro_iram0_1
104    }
105    #[doc = "0x18 - IBUS permission control register 2."]
106    #[inline(always)]
107    pub const fn pro_iram0_2(&self) -> &PRO_IRAM0_2 {
108        &self.pro_iram0_2
109    }
110    #[doc = "0x1c - IBUS permission control register 3."]
111    #[inline(always)]
112    pub const fn pro_iram0_3(&self) -> &PRO_IRAM0_3 {
113        &self.pro_iram0_3
114    }
115    #[doc = "0x20 - IBUS permission control register 4."]
116    #[inline(always)]
117    pub const fn pro_iram0_4(&self) -> &PRO_IRAM0_4 {
118        &self.pro_iram0_4
119    }
120    #[doc = "0x24 - IBUS status register."]
121    #[inline(always)]
122    pub const fn pro_iram0_5(&self) -> &PRO_IRAM0_5 {
123        &self.pro_iram0_5
124    }
125    #[doc = "0x28 - DBUS permission control register 0."]
126    #[inline(always)]
127    pub const fn pro_dram0_0(&self) -> &PRO_DRAM0_0 {
128        &self.pro_dram0_0
129    }
130    #[doc = "0x2c - DBUS permission control register 1."]
131    #[inline(always)]
132    pub const fn pro_dram0_1(&self) -> &PRO_DRAM0_1 {
133        &self.pro_dram0_1
134    }
135    #[doc = "0x30 - DBUS permission control register 2."]
136    #[inline(always)]
137    pub const fn pro_dram0_2(&self) -> &PRO_DRAM0_2 {
138        &self.pro_dram0_2
139    }
140    #[doc = "0x34 - DBUS permission control register 3."]
141    #[inline(always)]
142    pub const fn pro_dram0_3(&self) -> &PRO_DRAM0_3 {
143        &self.pro_dram0_3
144    }
145    #[doc = "0x38 - DBUS status register."]
146    #[inline(always)]
147    pub const fn pro_dram0_4(&self) -> &PRO_DRAM0_4 {
148        &self.pro_dram0_4
149    }
150    #[doc = "0x3c - PeriBus1 permission control register 0."]
151    #[inline(always)]
152    pub const fn pro_dport_0(&self) -> &PRO_DPORT_0 {
153        &self.pro_dport_0
154    }
155    #[doc = "0x40 - PeriBus1 permission control register 1."]
156    #[inline(always)]
157    pub const fn pro_dport_1(&self) -> &PRO_DPORT_1 {
158        &self.pro_dport_1
159    }
160    #[doc = "0x44 - PeriBus1 permission control register 2."]
161    #[inline(always)]
162    pub const fn pro_dport_2(&self) -> &PRO_DPORT_2 {
163        &self.pro_dport_2
164    }
165    #[doc = "0x48 - PeriBus1 permission control register 3."]
166    #[inline(always)]
167    pub const fn pro_dport_3(&self) -> &PRO_DPORT_3 {
168        &self.pro_dport_3
169    }
170    #[doc = "0x4c - PeriBus1 permission control register 4."]
171    #[inline(always)]
172    pub const fn pro_dport_4(&self) -> &PRO_DPORT_4 {
173        &self.pro_dport_4
174    }
175    #[doc = "0x50 - PeriBus1 permission control register 5."]
176    #[inline(always)]
177    pub const fn pro_dport_5(&self) -> &PRO_DPORT_5 {
178        &self.pro_dport_5
179    }
180    #[doc = "0x54 - PeriBus1 permission control register 6."]
181    #[inline(always)]
182    pub const fn pro_dport_6(&self) -> &PRO_DPORT_6 {
183        &self.pro_dport_6
184    }
185    #[doc = "0x58 - PeriBus1 status register."]
186    #[inline(always)]
187    pub const fn pro_dport_7(&self) -> &PRO_DPORT_7 {
188        &self.pro_dport_7
189    }
190    #[doc = "0x5c - PeriBus2 permission control register 0."]
191    #[inline(always)]
192    pub const fn pro_ahb_0(&self) -> &PRO_AHB_0 {
193        &self.pro_ahb_0
194    }
195    #[doc = "0x60 - PeriBus2 permission control register 1."]
196    #[inline(always)]
197    pub const fn pro_ahb_1(&self) -> &PRO_AHB_1 {
198        &self.pro_ahb_1
199    }
200    #[doc = "0x64 - PeriBus2 permission control register 2."]
201    #[inline(always)]
202    pub const fn pro_ahb_2(&self) -> &PRO_AHB_2 {
203        &self.pro_ahb_2
204    }
205    #[doc = "0x68 - PeriBus2 permission control register 3."]
206    #[inline(always)]
207    pub const fn pro_ahb_3(&self) -> &PRO_AHB_3 {
208        &self.pro_ahb_3
209    }
210    #[doc = "0x6c - PeriBus2 status register."]
211    #[inline(always)]
212    pub const fn pro_ahb_4(&self) -> &PRO_AHB_4 {
213        &self.pro_ahb_4
214    }
215    #[doc = "0x70 - Trace memory permission control register 0."]
216    #[inline(always)]
217    pub const fn pro_trace_0(&self) -> &PRO_TRACE_0 {
218        &self.pro_trace_0
219    }
220    #[doc = "0x74 - Trace memory permission control register 1."]
221    #[inline(always)]
222    pub const fn pro_trace_1(&self) -> &PRO_TRACE_1 {
223        &self.pro_trace_1
224    }
225    #[doc = "0x78 - Cache permission control register 0."]
226    #[inline(always)]
227    pub const fn pro_cache_0(&self) -> &PRO_CACHE_0 {
228        &self.pro_cache_0
229    }
230    #[doc = "0x7c - Cache permission control register 1."]
231    #[inline(always)]
232    pub const fn pro_cache_1(&self) -> &PRO_CACHE_1 {
233        &self.pro_cache_1
234    }
235    #[doc = "0x80 - Cache permission control register 2."]
236    #[inline(always)]
237    pub const fn pro_cache_2(&self) -> &PRO_CACHE_2 {
238        &self.pro_cache_2
239    }
240    #[doc = "0x84 - Icache status register."]
241    #[inline(always)]
242    pub const fn pro_cache_3(&self) -> &PRO_CACHE_3 {
243        &self.pro_cache_3
244    }
245    #[doc = "0x88 - Dcache status register."]
246    #[inline(always)]
247    pub const fn pro_cache_4(&self) -> &PRO_CACHE_4 {
248        &self.pro_cache_4
249    }
250    #[doc = "0x8c - Internal DMA permission control register 0."]
251    #[inline(always)]
252    pub const fn dma_apb_i_0(&self) -> &DMA_APB_I_0 {
253        &self.dma_apb_i_0
254    }
255    #[doc = "0x90 - Internal DMA permission control register 1."]
256    #[inline(always)]
257    pub const fn dma_apb_i_1(&self) -> &DMA_APB_I_1 {
258        &self.dma_apb_i_1
259    }
260    #[doc = "0x94 - Internal DMA permission control register 2."]
261    #[inline(always)]
262    pub const fn dma_apb_i_2(&self) -> &DMA_APB_I_2 {
263        &self.dma_apb_i_2
264    }
265    #[doc = "0x98 - Internal DMA status register."]
266    #[inline(always)]
267    pub const fn dma_apb_i_3(&self) -> &DMA_APB_I_3 {
268        &self.dma_apb_i_3
269    }
270    #[doc = "0x9c - RX Copy DMA permission control register 0."]
271    #[inline(always)]
272    pub const fn dma_rx_i_0(&self) -> &DMA_RX_I_0 {
273        &self.dma_rx_i_0
274    }
275    #[doc = "0xa0 - RX Copy DMA permission control register 1."]
276    #[inline(always)]
277    pub const fn dma_rx_i_1(&self) -> &DMA_RX_I_1 {
278        &self.dma_rx_i_1
279    }
280    #[doc = "0xa4 - RX Copy DMA permission control register 2."]
281    #[inline(always)]
282    pub const fn dma_rx_i_2(&self) -> &DMA_RX_I_2 {
283        &self.dma_rx_i_2
284    }
285    #[doc = "0xa8 - RX Copy DMA status register."]
286    #[inline(always)]
287    pub const fn dma_rx_i_3(&self) -> &DMA_RX_I_3 {
288        &self.dma_rx_i_3
289    }
290    #[doc = "0xac - TX Copy DMA permission control register 0."]
291    #[inline(always)]
292    pub const fn dma_tx_i_0(&self) -> &DMA_TX_I_0 {
293        &self.dma_tx_i_0
294    }
295    #[doc = "0xb0 - TX Copy DMA permission control register 1."]
296    #[inline(always)]
297    pub const fn dma_tx_i_1(&self) -> &DMA_TX_I_1 {
298        &self.dma_tx_i_1
299    }
300    #[doc = "0xb4 - TX Copy DMA permission control register 2."]
301    #[inline(always)]
302    pub const fn dma_tx_i_2(&self) -> &DMA_TX_I_2 {
303        &self.dma_tx_i_2
304    }
305    #[doc = "0xb8 - TX Copy DMA status register."]
306    #[inline(always)]
307    pub const fn dma_tx_i_3(&self) -> &DMA_TX_I_3 {
308        &self.dma_tx_i_3
309    }
310    #[doc = "0xbc - Boot permission control register 0."]
311    #[inline(always)]
312    pub const fn pro_boot_location_0(&self) -> &PRO_BOOT_LOCATION_0 {
313        &self.pro_boot_location_0
314    }
315    #[doc = "0xc0 - Boot permission control register 1."]
316    #[inline(always)]
317    pub const fn pro_boot_location_1(&self) -> &PRO_BOOT_LOCATION_1 {
318        &self.pro_boot_location_1
319    }
320    #[doc = "0xc4 - Cache access permission control register 0."]
321    #[inline(always)]
322    pub const fn cache_source_0(&self) -> &CACHE_SOURCE_0 {
323        &self.cache_source_0
324    }
325    #[doc = "0xc8 - Cache access permission control register 1."]
326    #[inline(always)]
327    pub const fn cache_source_1(&self) -> &CACHE_SOURCE_1 {
328        &self.cache_source_1
329    }
330    #[doc = "0xcc - Peripheral access permission control register 0."]
331    #[inline(always)]
332    pub const fn apb_peripheral_0(&self) -> &APB_PERIPHERAL_0 {
333        &self.apb_peripheral_0
334    }
335    #[doc = "0xd0 - Peripheral access permission control register 1."]
336    #[inline(always)]
337    pub const fn apb_peripheral_1(&self) -> &APB_PERIPHERAL_1 {
338        &self.apb_peripheral_1
339    }
340    #[doc = "0xd4 - Occupy permission control register 0."]
341    #[inline(always)]
342    pub const fn occupy_0(&self) -> &OCCUPY_0 {
343        &self.occupy_0
344    }
345    #[doc = "0xd8 - Occupy permission control register 1."]
346    #[inline(always)]
347    pub const fn occupy_1(&self) -> &OCCUPY_1 {
348        &self.occupy_1
349    }
350    #[doc = "0xdc - Occupy permission control register 2."]
351    #[inline(always)]
352    pub const fn occupy_2(&self) -> &OCCUPY_2 {
353        &self.occupy_2
354    }
355    #[doc = "0xe0 - Occupy permission control register 3."]
356    #[inline(always)]
357    pub const fn occupy_3(&self) -> &OCCUPY_3 {
358        &self.occupy_3
359    }
360    #[doc = "0xe4 - Cache tag permission control register 0."]
361    #[inline(always)]
362    pub const fn cache_tag_access_0(&self) -> &CACHE_TAG_ACCESS_0 {
363        &self.cache_tag_access_0
364    }
365    #[doc = "0xe8 - Cache tag permission control register 1."]
366    #[inline(always)]
367    pub const fn cache_tag_access_1(&self) -> &CACHE_TAG_ACCESS_1 {
368        &self.cache_tag_access_1
369    }
370    #[doc = "0xec - Cache MMU permission control register 0."]
371    #[inline(always)]
372    pub const fn cache_mmu_access_0(&self) -> &CACHE_MMU_ACCESS_0 {
373        &self.cache_mmu_access_0
374    }
375    #[doc = "0xf0 - Cache MMU permission control register 1."]
376    #[inline(always)]
377    pub const fn cache_mmu_access_1(&self) -> &CACHE_MMU_ACCESS_1 {
378        &self.cache_mmu_access_1
379    }
380    #[doc = "0xf4 - PeribBus2 permission control register."]
381    #[inline(always)]
382    pub const fn apb_peripheral_intr(&self) -> &APB_PERIPHERAL_INTR {
383        &self.apb_peripheral_intr
384    }
385    #[doc = "0xf8 - PeribBus2 peripheral access status register."]
386    #[inline(always)]
387    pub const fn apb_peripheral_status(&self) -> &APB_PERIPHERAL_STATUS {
388        &self.apb_peripheral_status
389    }
390    #[doc = "0xfc - PeribBus1 permission control register."]
391    #[inline(always)]
392    pub const fn cpu_peripheral_intr(&self) -> &CPU_PERIPHERAL_INTR {
393        &self.cpu_peripheral_intr
394    }
395    #[doc = "0x100 - PeribBus1 peripheral access status register."]
396    #[inline(always)]
397    pub const fn cpu_peripheral_status(&self) -> &CPU_PERIPHERAL_STATUS {
398        &self.cpu_peripheral_status
399    }
400    #[doc = "0x104 - Clock gate register of permission control."]
401    #[inline(always)]
402    pub const fn clock_gate(&self) -> &CLOCK_GATE {
403        &self.clock_gate
404    }
405    #[doc = "0xffc - Version control register."]
406    #[inline(always)]
407    pub const fn date(&self) -> &DATE {
408        &self.date
409    }
410}
411#[doc = "SDIO_0 (rw) register accessor: SDIO permission control register 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`sdio_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sdio_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdio_0`] module"]
412pub type SDIO_0 = crate::Reg<sdio_0::SDIO_0_SPEC>;
413#[doc = "SDIO permission control register 0."]
414pub mod sdio_0;
415#[doc = "SDIO_1 (rw) register accessor: SDIO permission control register 1.\n\nYou can [`read`](crate::Reg::read) this register and get [`sdio_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sdio_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdio_1`] module"]
416pub type SDIO_1 = crate::Reg<sdio_1::SDIO_1_SPEC>;
417#[doc = "SDIO permission control register 1."]
418pub mod sdio_1;
419#[doc = "MAC_DUMP_0 (rw) register accessor: MAC dump permission control register 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_dump_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_dump_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_dump_0`] module"]
420pub type MAC_DUMP_0 = crate::Reg<mac_dump_0::MAC_DUMP_0_SPEC>;
421#[doc = "MAC dump permission control register 0."]
422pub mod mac_dump_0;
423#[doc = "MAC_DUMP_1 (rw) register accessor: MAC dump permission control register 1.\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_dump_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_dump_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_dump_1`] module"]
424pub type MAC_DUMP_1 = crate::Reg<mac_dump_1::MAC_DUMP_1_SPEC>;
425#[doc = "MAC dump permission control register 1."]
426pub mod mac_dump_1;
427#[doc = "PRO_IRAM0_0 (rw) register accessor: IBUS permission control register 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_iram0_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_iram0_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_iram0_0`] module"]
428pub type PRO_IRAM0_0 = crate::Reg<pro_iram0_0::PRO_IRAM0_0_SPEC>;
429#[doc = "IBUS permission control register 0."]
430pub mod pro_iram0_0;
431#[doc = "PRO_IRAM0_1 (rw) register accessor: IBUS permission control register 1.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_iram0_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_iram0_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_iram0_1`] module"]
432pub type PRO_IRAM0_1 = crate::Reg<pro_iram0_1::PRO_IRAM0_1_SPEC>;
433#[doc = "IBUS permission control register 1."]
434pub mod pro_iram0_1;
435#[doc = "PRO_IRAM0_2 (rw) register accessor: IBUS permission control register 2.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_iram0_2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_iram0_2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_iram0_2`] module"]
436pub type PRO_IRAM0_2 = crate::Reg<pro_iram0_2::PRO_IRAM0_2_SPEC>;
437#[doc = "IBUS permission control register 2."]
438pub mod pro_iram0_2;
439#[doc = "PRO_IRAM0_3 (rw) register accessor: IBUS permission control register 3.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_iram0_3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_iram0_3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_iram0_3`] module"]
440pub type PRO_IRAM0_3 = crate::Reg<pro_iram0_3::PRO_IRAM0_3_SPEC>;
441#[doc = "IBUS permission control register 3."]
442pub mod pro_iram0_3;
443#[doc = "PRO_IRAM0_4 (rw) register accessor: IBUS permission control register 4.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_iram0_4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_iram0_4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_iram0_4`] module"]
444pub type PRO_IRAM0_4 = crate::Reg<pro_iram0_4::PRO_IRAM0_4_SPEC>;
445#[doc = "IBUS permission control register 4."]
446pub mod pro_iram0_4;
447#[doc = "PRO_IRAM0_5 (r) register accessor: IBUS status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_iram0_5::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_iram0_5`] module"]
448pub type PRO_IRAM0_5 = crate::Reg<pro_iram0_5::PRO_IRAM0_5_SPEC>;
449#[doc = "IBUS status register."]
450pub mod pro_iram0_5;
451#[doc = "PRO_DRAM0_0 (rw) register accessor: DBUS permission control register 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_dram0_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_dram0_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_dram0_0`] module"]
452pub type PRO_DRAM0_0 = crate::Reg<pro_dram0_0::PRO_DRAM0_0_SPEC>;
453#[doc = "DBUS permission control register 0."]
454pub mod pro_dram0_0;
455#[doc = "PRO_DRAM0_1 (rw) register accessor: DBUS permission control register 1.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_dram0_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_dram0_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_dram0_1`] module"]
456pub type PRO_DRAM0_1 = crate::Reg<pro_dram0_1::PRO_DRAM0_1_SPEC>;
457#[doc = "DBUS permission control register 1."]
458pub mod pro_dram0_1;
459#[doc = "PRO_DRAM0_2 (rw) register accessor: DBUS permission control register 2.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_dram0_2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_dram0_2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_dram0_2`] module"]
460pub type PRO_DRAM0_2 = crate::Reg<pro_dram0_2::PRO_DRAM0_2_SPEC>;
461#[doc = "DBUS permission control register 2."]
462pub mod pro_dram0_2;
463#[doc = "PRO_DRAM0_3 (rw) register accessor: DBUS permission control register 3.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_dram0_3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_dram0_3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_dram0_3`] module"]
464pub type PRO_DRAM0_3 = crate::Reg<pro_dram0_3::PRO_DRAM0_3_SPEC>;
465#[doc = "DBUS permission control register 3."]
466pub mod pro_dram0_3;
467#[doc = "PRO_DRAM0_4 (r) register accessor: DBUS status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_dram0_4::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_dram0_4`] module"]
468pub type PRO_DRAM0_4 = crate::Reg<pro_dram0_4::PRO_DRAM0_4_SPEC>;
469#[doc = "DBUS status register."]
470pub mod pro_dram0_4;
471#[doc = "PRO_DPORT_0 (rw) register accessor: PeriBus1 permission control register 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_dport_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_dport_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_dport_0`] module"]
472pub type PRO_DPORT_0 = crate::Reg<pro_dport_0::PRO_DPORT_0_SPEC>;
473#[doc = "PeriBus1 permission control register 0."]
474pub mod pro_dport_0;
475#[doc = "PRO_DPORT_1 (rw) register accessor: PeriBus1 permission control register 1.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_dport_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_dport_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_dport_1`] module"]
476pub type PRO_DPORT_1 = crate::Reg<pro_dport_1::PRO_DPORT_1_SPEC>;
477#[doc = "PeriBus1 permission control register 1."]
478pub mod pro_dport_1;
479#[doc = "PRO_DPORT_2 (rw) register accessor: PeriBus1 permission control register 2.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_dport_2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_dport_2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_dport_2`] module"]
480pub type PRO_DPORT_2 = crate::Reg<pro_dport_2::PRO_DPORT_2_SPEC>;
481#[doc = "PeriBus1 permission control register 2."]
482pub mod pro_dport_2;
483#[doc = "PRO_DPORT_3 (rw) register accessor: PeriBus1 permission control register 3.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_dport_3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_dport_3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_dport_3`] module"]
484pub type PRO_DPORT_3 = crate::Reg<pro_dport_3::PRO_DPORT_3_SPEC>;
485#[doc = "PeriBus1 permission control register 3."]
486pub mod pro_dport_3;
487#[doc = "PRO_DPORT_4 (rw) register accessor: PeriBus1 permission control register 4.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_dport_4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_dport_4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_dport_4`] module"]
488pub type PRO_DPORT_4 = crate::Reg<pro_dport_4::PRO_DPORT_4_SPEC>;
489#[doc = "PeriBus1 permission control register 4."]
490pub mod pro_dport_4;
491#[doc = "PRO_DPORT_5 (rw) register accessor: PeriBus1 permission control register 5.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_dport_5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_dport_5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_dport_5`] module"]
492pub type PRO_DPORT_5 = crate::Reg<pro_dport_5::PRO_DPORT_5_SPEC>;
493#[doc = "PeriBus1 permission control register 5."]
494pub mod pro_dport_5;
495#[doc = "PRO_DPORT_6 (rw) register accessor: PeriBus1 permission control register 6.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_dport_6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_dport_6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_dport_6`] module"]
496pub type PRO_DPORT_6 = crate::Reg<pro_dport_6::PRO_DPORT_6_SPEC>;
497#[doc = "PeriBus1 permission control register 6."]
498pub mod pro_dport_6;
499#[doc = "PRO_DPORT_7 (r) register accessor: PeriBus1 status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_dport_7::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_dport_7`] module"]
500pub type PRO_DPORT_7 = crate::Reg<pro_dport_7::PRO_DPORT_7_SPEC>;
501#[doc = "PeriBus1 status register."]
502pub mod pro_dport_7;
503#[doc = "PRO_AHB_0 (rw) register accessor: PeriBus2 permission control register 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_ahb_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_ahb_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_ahb_0`] module"]
504pub type PRO_AHB_0 = crate::Reg<pro_ahb_0::PRO_AHB_0_SPEC>;
505#[doc = "PeriBus2 permission control register 0."]
506pub mod pro_ahb_0;
507#[doc = "PRO_AHB_1 (rw) register accessor: PeriBus2 permission control register 1.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_ahb_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_ahb_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_ahb_1`] module"]
508pub type PRO_AHB_1 = crate::Reg<pro_ahb_1::PRO_AHB_1_SPEC>;
509#[doc = "PeriBus2 permission control register 1."]
510pub mod pro_ahb_1;
511#[doc = "PRO_AHB_2 (rw) register accessor: PeriBus2 permission control register 2.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_ahb_2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_ahb_2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_ahb_2`] module"]
512pub type PRO_AHB_2 = crate::Reg<pro_ahb_2::PRO_AHB_2_SPEC>;
513#[doc = "PeriBus2 permission control register 2."]
514pub mod pro_ahb_2;
515#[doc = "PRO_AHB_3 (rw) register accessor: PeriBus2 permission control register 3.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_ahb_3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_ahb_3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_ahb_3`] module"]
516pub type PRO_AHB_3 = crate::Reg<pro_ahb_3::PRO_AHB_3_SPEC>;
517#[doc = "PeriBus2 permission control register 3."]
518pub mod pro_ahb_3;
519#[doc = "PRO_AHB_4 (r) register accessor: PeriBus2 status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_ahb_4::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_ahb_4`] module"]
520pub type PRO_AHB_4 = crate::Reg<pro_ahb_4::PRO_AHB_4_SPEC>;
521#[doc = "PeriBus2 status register."]
522pub mod pro_ahb_4;
523#[doc = "PRO_TRACE_0 (rw) register accessor: Trace memory permission control register 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_trace_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_trace_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_trace_0`] module"]
524pub type PRO_TRACE_0 = crate::Reg<pro_trace_0::PRO_TRACE_0_SPEC>;
525#[doc = "Trace memory permission control register 0."]
526pub mod pro_trace_0;
527#[doc = "PRO_TRACE_1 (rw) register accessor: Trace memory permission control register 1.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_trace_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_trace_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_trace_1`] module"]
528pub type PRO_TRACE_1 = crate::Reg<pro_trace_1::PRO_TRACE_1_SPEC>;
529#[doc = "Trace memory permission control register 1."]
530pub mod pro_trace_1;
531#[doc = "PRO_CACHE_0 (rw) register accessor: Cache permission control register 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_cache_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_cache_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_cache_0`] module"]
532pub type PRO_CACHE_0 = crate::Reg<pro_cache_0::PRO_CACHE_0_SPEC>;
533#[doc = "Cache permission control register 0."]
534pub mod pro_cache_0;
535#[doc = "PRO_CACHE_1 (rw) register accessor: Cache permission control register 1.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_cache_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_cache_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_cache_1`] module"]
536pub type PRO_CACHE_1 = crate::Reg<pro_cache_1::PRO_CACHE_1_SPEC>;
537#[doc = "Cache permission control register 1."]
538pub mod pro_cache_1;
539#[doc = "PRO_CACHE_2 (rw) register accessor: Cache permission control register 2.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_cache_2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_cache_2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_cache_2`] module"]
540pub type PRO_CACHE_2 = crate::Reg<pro_cache_2::PRO_CACHE_2_SPEC>;
541#[doc = "Cache permission control register 2."]
542pub mod pro_cache_2;
543#[doc = "PRO_CACHE_3 (r) register accessor: Icache status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_cache_3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_cache_3`] module"]
544pub type PRO_CACHE_3 = crate::Reg<pro_cache_3::PRO_CACHE_3_SPEC>;
545#[doc = "Icache status register."]
546pub mod pro_cache_3;
547#[doc = "PRO_CACHE_4 (r) register accessor: Dcache status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_cache_4::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_cache_4`] module"]
548pub type PRO_CACHE_4 = crate::Reg<pro_cache_4::PRO_CACHE_4_SPEC>;
549#[doc = "Dcache status register."]
550pub mod pro_cache_4;
551#[doc = "DMA_APB_I_0 (rw) register accessor: Internal DMA permission control register 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_apb_i_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_apb_i_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_apb_i_0`] module"]
552pub type DMA_APB_I_0 = crate::Reg<dma_apb_i_0::DMA_APB_I_0_SPEC>;
553#[doc = "Internal DMA permission control register 0."]
554pub mod dma_apb_i_0;
555#[doc = "DMA_APB_I_1 (rw) register accessor: Internal DMA permission control register 1.\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_apb_i_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_apb_i_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_apb_i_1`] module"]
556pub type DMA_APB_I_1 = crate::Reg<dma_apb_i_1::DMA_APB_I_1_SPEC>;
557#[doc = "Internal DMA permission control register 1."]
558pub mod dma_apb_i_1;
559#[doc = "DMA_APB_I_2 (rw) register accessor: Internal DMA permission control register 2.\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_apb_i_2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_apb_i_2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_apb_i_2`] module"]
560pub type DMA_APB_I_2 = crate::Reg<dma_apb_i_2::DMA_APB_I_2_SPEC>;
561#[doc = "Internal DMA permission control register 2."]
562pub mod dma_apb_i_2;
563#[doc = "DMA_APB_I_3 (r) register accessor: Internal DMA status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_apb_i_3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_apb_i_3`] module"]
564pub type DMA_APB_I_3 = crate::Reg<dma_apb_i_3::DMA_APB_I_3_SPEC>;
565#[doc = "Internal DMA status register."]
566pub mod dma_apb_i_3;
567#[doc = "DMA_RX_I_0 (rw) register accessor: RX Copy DMA permission control register 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_rx_i_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_rx_i_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_rx_i_0`] module"]
568pub type DMA_RX_I_0 = crate::Reg<dma_rx_i_0::DMA_RX_I_0_SPEC>;
569#[doc = "RX Copy DMA permission control register 0."]
570pub mod dma_rx_i_0;
571#[doc = "DMA_RX_I_1 (rw) register accessor: RX Copy DMA permission control register 1.\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_rx_i_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_rx_i_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_rx_i_1`] module"]
572pub type DMA_RX_I_1 = crate::Reg<dma_rx_i_1::DMA_RX_I_1_SPEC>;
573#[doc = "RX Copy DMA permission control register 1."]
574pub mod dma_rx_i_1;
575#[doc = "DMA_RX_I_2 (rw) register accessor: RX Copy DMA permission control register 2.\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_rx_i_2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_rx_i_2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_rx_i_2`] module"]
576pub type DMA_RX_I_2 = crate::Reg<dma_rx_i_2::DMA_RX_I_2_SPEC>;
577#[doc = "RX Copy DMA permission control register 2."]
578pub mod dma_rx_i_2;
579#[doc = "DMA_RX_I_3 (r) register accessor: RX Copy DMA status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_rx_i_3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_rx_i_3`] module"]
580pub type DMA_RX_I_3 = crate::Reg<dma_rx_i_3::DMA_RX_I_3_SPEC>;
581#[doc = "RX Copy DMA status register."]
582pub mod dma_rx_i_3;
583#[doc = "DMA_TX_I_0 (rw) register accessor: TX Copy DMA permission control register 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_tx_i_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_tx_i_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_tx_i_0`] module"]
584pub type DMA_TX_I_0 = crate::Reg<dma_tx_i_0::DMA_TX_I_0_SPEC>;
585#[doc = "TX Copy DMA permission control register 0."]
586pub mod dma_tx_i_0;
587#[doc = "DMA_TX_I_1 (rw) register accessor: TX Copy DMA permission control register 1.\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_tx_i_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_tx_i_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_tx_i_1`] module"]
588pub type DMA_TX_I_1 = crate::Reg<dma_tx_i_1::DMA_TX_I_1_SPEC>;
589#[doc = "TX Copy DMA permission control register 1."]
590pub mod dma_tx_i_1;
591#[doc = "DMA_TX_I_2 (rw) register accessor: TX Copy DMA permission control register 2.\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_tx_i_2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_tx_i_2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_tx_i_2`] module"]
592pub type DMA_TX_I_2 = crate::Reg<dma_tx_i_2::DMA_TX_I_2_SPEC>;
593#[doc = "TX Copy DMA permission control register 2."]
594pub mod dma_tx_i_2;
595#[doc = "DMA_TX_I_3 (r) register accessor: TX Copy DMA status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_tx_i_3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_tx_i_3`] module"]
596pub type DMA_TX_I_3 = crate::Reg<dma_tx_i_3::DMA_TX_I_3_SPEC>;
597#[doc = "TX Copy DMA status register."]
598pub mod dma_tx_i_3;
599#[doc = "PRO_BOOT_LOCATION_0 (rw) register accessor: Boot permission control register 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_boot_location_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_boot_location_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_boot_location_0`] module"]
600pub type PRO_BOOT_LOCATION_0 = crate::Reg<pro_boot_location_0::PRO_BOOT_LOCATION_0_SPEC>;
601#[doc = "Boot permission control register 0."]
602pub mod pro_boot_location_0;
603#[doc = "PRO_BOOT_LOCATION_1 (rw) register accessor: Boot permission control register 1.\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_boot_location_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_boot_location_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_boot_location_1`] module"]
604pub type PRO_BOOT_LOCATION_1 = crate::Reg<pro_boot_location_1::PRO_BOOT_LOCATION_1_SPEC>;
605#[doc = "Boot permission control register 1."]
606pub mod pro_boot_location_1;
607#[doc = "CACHE_SOURCE_0 (rw) register accessor: Cache access permission control register 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_source_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_source_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_source_0`] module"]
608pub type CACHE_SOURCE_0 = crate::Reg<cache_source_0::CACHE_SOURCE_0_SPEC>;
609#[doc = "Cache access permission control register 0."]
610pub mod cache_source_0;
611#[doc = "CACHE_SOURCE_1 (rw) register accessor: Cache access permission control register 1.\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_source_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_source_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_source_1`] module"]
612pub type CACHE_SOURCE_1 = crate::Reg<cache_source_1::CACHE_SOURCE_1_SPEC>;
613#[doc = "Cache access permission control register 1."]
614pub mod cache_source_1;
615#[doc = "APB_PERIPHERAL_0 (rw) register accessor: Peripheral access permission control register 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`apb_peripheral_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`apb_peripheral_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@apb_peripheral_0`] module"]
616pub type APB_PERIPHERAL_0 = crate::Reg<apb_peripheral_0::APB_PERIPHERAL_0_SPEC>;
617#[doc = "Peripheral access permission control register 0."]
618pub mod apb_peripheral_0;
619#[doc = "APB_PERIPHERAL_1 (rw) register accessor: Peripheral access permission control register 1.\n\nYou can [`read`](crate::Reg::read) this register and get [`apb_peripheral_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`apb_peripheral_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@apb_peripheral_1`] module"]
620pub type APB_PERIPHERAL_1 = crate::Reg<apb_peripheral_1::APB_PERIPHERAL_1_SPEC>;
621#[doc = "Peripheral access permission control register 1."]
622pub mod apb_peripheral_1;
623#[doc = "OCCUPY_0 (rw) register accessor: Occupy permission control register 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`occupy_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`occupy_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@occupy_0`] module"]
624pub type OCCUPY_0 = crate::Reg<occupy_0::OCCUPY_0_SPEC>;
625#[doc = "Occupy permission control register 0."]
626pub mod occupy_0;
627#[doc = "OCCUPY_1 (rw) register accessor: Occupy permission control register 1.\n\nYou can [`read`](crate::Reg::read) this register and get [`occupy_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`occupy_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@occupy_1`] module"]
628pub type OCCUPY_1 = crate::Reg<occupy_1::OCCUPY_1_SPEC>;
629#[doc = "Occupy permission control register 1."]
630pub mod occupy_1;
631#[doc = "OCCUPY_2 (rw) register accessor: Occupy permission control register 2.\n\nYou can [`read`](crate::Reg::read) this register and get [`occupy_2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`occupy_2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@occupy_2`] module"]
632pub type OCCUPY_2 = crate::Reg<occupy_2::OCCUPY_2_SPEC>;
633#[doc = "Occupy permission control register 2."]
634pub mod occupy_2;
635#[doc = "OCCUPY_3 (rw) register accessor: Occupy permission control register 3.\n\nYou can [`read`](crate::Reg::read) this register and get [`occupy_3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`occupy_3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@occupy_3`] module"]
636pub type OCCUPY_3 = crate::Reg<occupy_3::OCCUPY_3_SPEC>;
637#[doc = "Occupy permission control register 3."]
638pub mod occupy_3;
639#[doc = "CACHE_TAG_ACCESS_0 (rw) register accessor: Cache tag permission control register 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_tag_access_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_tag_access_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_tag_access_0`] module"]
640pub type CACHE_TAG_ACCESS_0 = crate::Reg<cache_tag_access_0::CACHE_TAG_ACCESS_0_SPEC>;
641#[doc = "Cache tag permission control register 0."]
642pub mod cache_tag_access_0;
643#[doc = "CACHE_TAG_ACCESS_1 (rw) register accessor: Cache tag permission control register 1.\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_tag_access_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_tag_access_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_tag_access_1`] module"]
644pub type CACHE_TAG_ACCESS_1 = crate::Reg<cache_tag_access_1::CACHE_TAG_ACCESS_1_SPEC>;
645#[doc = "Cache tag permission control register 1."]
646pub mod cache_tag_access_1;
647#[doc = "CACHE_MMU_ACCESS_0 (rw) register accessor: Cache MMU permission control register 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_mmu_access_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_mmu_access_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_mmu_access_0`] module"]
648pub type CACHE_MMU_ACCESS_0 = crate::Reg<cache_mmu_access_0::CACHE_MMU_ACCESS_0_SPEC>;
649#[doc = "Cache MMU permission control register 0."]
650pub mod cache_mmu_access_0;
651#[doc = "CACHE_MMU_ACCESS_1 (rw) register accessor: Cache MMU permission control register 1.\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_mmu_access_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_mmu_access_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_mmu_access_1`] module"]
652pub type CACHE_MMU_ACCESS_1 = crate::Reg<cache_mmu_access_1::CACHE_MMU_ACCESS_1_SPEC>;
653#[doc = "Cache MMU permission control register 1."]
654pub mod cache_mmu_access_1;
655#[doc = "APB_PERIPHERAL_INTR (rw) register accessor: PeribBus2 permission control register.\n\nYou can [`read`](crate::Reg::read) this register and get [`apb_peripheral_intr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`apb_peripheral_intr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@apb_peripheral_intr`] module"]
656pub type APB_PERIPHERAL_INTR = crate::Reg<apb_peripheral_intr::APB_PERIPHERAL_INTR_SPEC>;
657#[doc = "PeribBus2 permission control register."]
658pub mod apb_peripheral_intr;
659#[doc = "APB_PERIPHERAL_STATUS (r) register accessor: PeribBus2 peripheral access status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`apb_peripheral_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@apb_peripheral_status`] module"]
660pub type APB_PERIPHERAL_STATUS = crate::Reg<apb_peripheral_status::APB_PERIPHERAL_STATUS_SPEC>;
661#[doc = "PeribBus2 peripheral access status register."]
662pub mod apb_peripheral_status;
663#[doc = "CPU_PERIPHERAL_INTR (rw) register accessor: PeribBus1 permission control register.\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_peripheral_intr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_peripheral_intr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_peripheral_intr`] module"]
664pub type CPU_PERIPHERAL_INTR = crate::Reg<cpu_peripheral_intr::CPU_PERIPHERAL_INTR_SPEC>;
665#[doc = "PeribBus1 permission control register."]
666pub mod cpu_peripheral_intr;
667#[doc = "CPU_PERIPHERAL_STATUS (r) register accessor: PeribBus1 peripheral access status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_peripheral_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_peripheral_status`] module"]
668pub type CPU_PERIPHERAL_STATUS = crate::Reg<cpu_peripheral_status::CPU_PERIPHERAL_STATUS_SPEC>;
669#[doc = "PeribBus1 peripheral access status register."]
670pub mod cpu_peripheral_status;
671#[doc = "CLOCK_GATE (rw) register accessor: Clock gate register of permission control.\n\nYou can [`read`](crate::Reg::read) this register and get [`clock_gate::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clock_gate::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clock_gate`] module"]
672pub type CLOCK_GATE = crate::Reg<clock_gate::CLOCK_GATE_SPEC>;
673#[doc = "Clock gate register of permission control."]
674pub mod clock_gate;
675#[doc = "DATE (rw) register accessor: Version control register.\n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
676pub type DATE = crate::Reg<date::DATE_SPEC>;
677#[doc = "Version control register."]
678pub mod date;
esp32s2/pms.rs

esp32s2/
pms.rs
