Expand description
I2C (Inter-Integrated Circuit) Controller 0
Modules§
- I2C command register %s
- Transmission setting
- RX FIFO read data
- Version control register
- FIFO configuration register
- FIFO status register
- Interrupt clear bits
- Interrupt enable bits
- Raw interrupt status
- Status of captured I2C communication events
- SCL filter configuration register
- Configures the high level width of the SCL clock
- Configures the low level width of the SCL clock
- SCL main status time out register
- Configures the interval between the positive edge of SCL and the negative edge of SDA
- Power configuration register
- SCL status time out register
- Configures the interval between pulling SDA low and pulling SCL low when the master generates a START condition
- Configures the delay after the SCL clock edge for a stop condition
- Configures the delay between the SDA and SCL positive edge for a stop condition
- Set SCL stretch of I2C slave
- SDA filter configuration register
- Configures the hold time after a negative SCL edge
- Configures the sample time after a positive SCL edge
- Local slave address setting
- Describe I2C work status
- Setting time out control for receiving data
Structs§
- Register block
Type Aliases§
- COMD (rw) register accessor: I2C command register %s
- CTR (rw) register accessor: Transmission setting
- DATA (rw) register accessor: RX FIFO read data
- DATE (rw) register accessor: Version control register
- FIFO_CONF (rw) register accessor: FIFO configuration register
- FIFO_ST (rw) register accessor: FIFO status register
- INT_CLR (w) register accessor: Interrupt clear bits
- INT_ENA (rw) register accessor: Interrupt enable bits
- INT_RAW (r) register accessor: Raw interrupt status
- INT_ST (r) register accessor: Status of captured I2C communication events
- SCL_FILTER_CFG (rw) register accessor: SCL filter configuration register
- SCL_HIGH_PERIOD (rw) register accessor: Configures the high level width of the SCL clock
- SCL_LOW_PERIOD (rw) register accessor: Configures the low level width of the SCL clock
- SCL_MAIN_ST_TIME_OUT (rw) register accessor: SCL main status time out register
- SCL_RSTART_SETUP (rw) register accessor: Configures the interval between the positive edge of SCL and the negative edge of SDA
- SCL_SP_CONF (rw) register accessor: Power configuration register
- SCL_START_HOLD (rw) register accessor: Configures the interval between pulling SDA low and pulling SCL low when the master generates a START condition
- SCL_STOP_HOLD (rw) register accessor: Configures the delay after the SCL clock edge for a stop condition
- SCL_STOP_SETUP (rw) register accessor: Configures the delay between the SDA and SCL positive edge for a stop condition
- SCL_STRETCH_CONF (rw) register accessor: Set SCL stretch of I2C slave
- SCL_ST_TIME_OUT (rw) register accessor: SCL status time out register
- SDA_FILTER_CFG (rw) register accessor: SDA filter configuration register
- SDA_HOLD (rw) register accessor: Configures the hold time after a negative SCL edge
- SDA_SAMPLE (rw) register accessor: Configures the sample time after a positive SCL edge
- SLAVE_ADDR (rw) register accessor: Local slave address setting
- SR (r) register accessor: Describe I2C work status
- TO (rw) register accessor: Setting time out control for receiving data