Module esp32s2::rmt::chconf1

source ·
Expand description

Channel %s configure register 1

Structs

Type Aliases

  • APB_MEM_RST_W
    Field APB_MEM_RST writer - Set this bit to reset W/R ram address for CHANNEL%s by accessing apb fifo.
  • CHK_RX_CARRIER_EN_R
    Field CHK_RX_CARRIER_EN reader - Set this bit to enable memory loop read mode when carrier modulation is enabled for channel %s.
  • CHK_RX_CARRIER_EN_W
    Field CHK_RX_CARRIER_EN writer - Set this bit to enable memory loop read mode when carrier modulation is enabled for channel %s.
  • IDLE_OUT_EN_R
    Field IDLE_OUT_EN reader - This is the output enable-control bit for CHANNEL%s in IDLE state.
  • IDLE_OUT_EN_W
    Field IDLE_OUT_EN writer - This is the output enable-control bit for CHANNEL%s in IDLE state.
  • IDLE_OUT_LV_R
    Field IDLE_OUT_LV reader - This bit configures the level of output signal in CHANNEL%s when the latter is in IDLE state.
  • IDLE_OUT_LV_W
    Field IDLE_OUT_LV writer - This bit configures the level of output signal in CHANNEL%s when the latter is in IDLE state.
  • MEM_OWNER_R
    Field MEM_OWNER reader - This register marks the ownership of CHANNEL%s’s ram block. 1’h1: Receiver is using the ram. 1’h0: Transmitter is using the ram.
  • MEM_OWNER_W
    Field MEM_OWNER writer - This register marks the ownership of CHANNEL%s’s ram block. 1’h1: Receiver is using the ram. 1’h0: Transmitter is using the ram.
  • MEM_RD_RST_W
    Field MEM_RD_RST writer - Set this bit to reset read ram address for CHANNEL%s by accessing transmitter.
  • MEM_WR_RST_W
    Field MEM_WR_RST writer - Set this bit to reset write ram address for CHANNEL%s by accessing receiver.
  • R
    Register CH%sCONF1 reader
  • REF_ALWAYS_ON_R
    Field REF_ALWAYS_ON reader - This bit is used to select the base clock for CHANNEL%s. 1’h1: clk_apb 1’h0:clk_ref
  • REF_ALWAYS_ON_W
    Field REF_ALWAYS_ON writer - This bit is used to select the base clock for CHANNEL%s. 1’h1: clk_apb 1’h0:clk_ref
  • RX_EN_R
    Field RX_EN reader - Set this bit to enable receiver to receive data on CHANNEL%s.
  • RX_EN_W
    Field RX_EN writer - Set this bit to enable receiver to receive data on CHANNEL%s.
  • RX_FILTER_EN_R
    Field RX_FILTER_EN reader - This is the receive filter’s enable bit for CHANNEL%s.
  • RX_FILTER_EN_W
    Field RX_FILTER_EN writer - This is the receive filter’s enable bit for CHANNEL%s.
  • RX_FILTER_THRES_R
    Field RX_FILTER_THRES reader - Ignores the input pulse when its width is smaller than this register value in APB clock periods (in receive mode).
  • RX_FILTER_THRES_W
    Field RX_FILTER_THRES writer - Ignores the input pulse when its width is smaller than this register value in APB clock periods (in receive mode).
  • TX_CONTI_MODE_R
    Field TX_CONTI_MODE reader - Set this bit to restart transmission from the first data to the last data in CHANNEL%s.
  • TX_CONTI_MODE_W
    Field TX_CONTI_MODE writer - Set this bit to restart transmission from the first data to the last data in CHANNEL%s.
  • TX_START_R
    Field TX_START reader - Set this bit to start sending data on CHANNEL%s.
  • TX_START_W
    Field TX_START writer - Set this bit to start sending data on CHANNEL%s.
  • TX_STOP_R
    Field TX_STOP reader - Set this bit to stop the transmitter of CHANNEL%s sending data out.
  • TX_STOP_W
    Field TX_STOP writer - Set this bit to stop the transmitter of CHANNEL%s sending data out.
  • W
    Register CH%sCONF1 writer