Expand description
Interrupt clear bit of ULP-RISCV
Structs§
- SAR_
COCPU_ INT_ CLR_ SPEC - Interrupt clear bit of ULP-RISCV
Type Aliases§
- COCPU_
SARAD C1_ INT_ CLR_ W - Field
COCPU_SARADC1_INT_CLR
writer - SARADC1_DONE_INT interrupt clear bit - COCPU_
SARAD C2_ INT_ CLR_ W - Field
COCPU_SARADC2_INT_CLR
writer - SARADC2_DONE_INT interrupt clear bit - COCPU_
START_ INT_ CLR_ W - Field
COCPU_START_INT_CLR
writer - RISCV_START_INT interrupt clear bit - COCPU_
SWD_ INT_ CLR_ W - Field
COCPU_SWD_INT_CLR
writer - SWD_INT interrupt clear bit - COCPU_
SW_ INT_ CLR_ W - Field
COCPU_SW_INT_CLR
writer - SW_INT interrupt clear bit - COCPU_
TOUCH_ ACTIVE_ INT_ CLR_ W - Field
COCPU_TOUCH_ACTIVE_INT_CLR
writer - TOUCH_ACTIVE_INT interrupt clear bit - COCPU_
TOUCH_ DONE_ INT_ CLR_ W - Field
COCPU_TOUCH_DONE_INT_CLR
writer - TOUCH_DONE_INT interrupt clear bit - COCPU_
TOUCH_ INACTIVE_ INT_ CLR_ W - Field
COCPU_TOUCH_INACTIVE_INT_CLR
writer - TOUCH_INACTIVE_INT interrupt clear bit - COCPU_
TSENS_ INT_ CLR_ W - Field
COCPU_TSENS_INT_CLR
writer - TSENS_DONE_INT interrupt clear bit - W
- Register
SAR_COCPU_INT_CLR
writer