Module sar_cocpu_int_st 

Interrupt status bit of ULP-RISCV

Structs

SAR_COCPU_INT_ST_SPEC

Interrupt status bit of ULP-RISCV

Type Aliases

COCPU_SARADC1_INT_ST_R

Field COCPU_SARADC1_INT_ST reader - SARADC1_DONE_INT interrupt status bit

COCPU_SARADC2_INT_ST_R

Field COCPU_SARADC2_INT_ST reader - SARADC2_DONE_INT interrupt status bit

COCPU_START_INT_ST_R

Field COCPU_START_INT_ST reader - RISCV_START_INT interrupt status bit

COCPU_SWD_INT_ST_R

Field COCPU_SWD_INT_ST reader - SWD_INT interrupt status bit

COCPU_SW_INT_ST_R

Field COCPU_SW_INT_ST reader - SW_INT interrupt status bit

COCPU_TOUCH_ACTIVE_INT_ST_R

Field COCPU_TOUCH_ACTIVE_INT_ST reader - TOUCH_ACTIVE_INT interrupt status bit

COCPU_TOUCH_DONE_INT_ST_R

Field COCPU_TOUCH_DONE_INT_ST reader - TOUCH_DONE_INT interrupt status bit

COCPU_TOUCH_INACTIVE_INT_ST_R

Field COCPU_TOUCH_INACTIVE_INT_ST reader - TOUCH_INACTIVE_INT interrupt status bit

COCPU_TSENS_INT_ST_R

Field COCPU_TSENS_INT_ST reader - TSENS_DONE_INT interrupt status bit

R

Register SAR_COCPU_INT_ST reader