Expand description
Interrupt raw bit of ULP-RISCV
Structs§
- SAR_
COCPU_ INT_ RAW_ SPEC - Interrupt raw bit of ULP-RISCV
Type Aliases§
- COCPU_
SARAD C1_ INT_ RAW_ R - Field
COCPU_SARADC1_INT_RAWreader - SARADC1_DONE_INT interrupt raw bit - COCPU_
SARAD C2_ INT_ RAW_ R - Field
COCPU_SARADC2_INT_RAWreader - SARADC2_DONE_INT interrupt raw bit - COCPU_
START_ INT_ RAW_ R - Field
COCPU_START_INT_RAWreader - RISCV_START_INT interrupt raw bit - COCPU_
SWD_ INT_ RAW_ R - Field
COCPU_SWD_INT_RAWreader - SWD_INT interrupt raw bit - COCPU_
SW_ INT_ RAW_ R - Field
COCPU_SW_INT_RAWreader - SW_INT interrupt raw bit - COCPU_
TOUCH_ ACTIVE_ INT_ RAW_ R - Field
COCPU_TOUCH_ACTIVE_INT_RAWreader - TOUCH_ACTIVE_INT interrupt raw bit - COCPU_
TOUCH_ DONE_ INT_ RAW_ R - Field
COCPU_TOUCH_DONE_INT_RAWreader - TOUCH_DONE_INT interrupt raw bit - COCPU_
TOUCH_ INACTIVE_ INT_ RAW_ R - Field
COCPU_TOUCH_INACTIVE_INT_RAWreader - TOUCH_INACTIVE_INT interrupt raw bit - COCPU_
TSENS_ INT_ RAW_ R - Field
COCPU_TSENS_INT_RAWreader - TSENS_DONE_INT interrupt raw bit - R
- Register
SAR_COCPU_INT_RAWreader