esp32s2_ulp/rtc_io/
enable_w1ts.rs

1#[doc = "Register `ENABLE_W1TS` writer"]
2pub type W = crate::W<ENABLE_W1TS_SPEC>;
3#[doc = "Field `REG_RTCIO_REG_GPIO_ENABLE_W1TS` writer - GPIO0 ~ 21 output enable set register. If the value 1 is written to a bit here, the corresponding bit in RTCIO_RTC_GPIO_ENABLE_REG will be set to 1. Recommended operation: use this register to set RTCIO_RTC_GPIO_ENABLE_REG."]
4pub type REG_RTCIO_REG_GPIO_ENABLE_W1TS_W<'a, REG> = crate::FieldWriter<'a, REG, 22, u32>;
5#[cfg(feature = "impl-register-debug")]
6impl core::fmt::Debug for crate::generic::Reg<ENABLE_W1TS_SPEC> {
7    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
8        write!(f, "(not readable)")
9    }
10}
11impl W {
12    #[doc = "Bits 10:31 - GPIO0 ~ 21 output enable set register. If the value 1 is written to a bit here, the corresponding bit in RTCIO_RTC_GPIO_ENABLE_REG will be set to 1. Recommended operation: use this register to set RTCIO_RTC_GPIO_ENABLE_REG."]
13    #[inline(always)]
14    #[must_use]
15    pub fn reg_rtcio_reg_gpio_enable_w1ts(
16        &mut self,
17    ) -> REG_RTCIO_REG_GPIO_ENABLE_W1TS_W<ENABLE_W1TS_SPEC> {
18        REG_RTCIO_REG_GPIO_ENABLE_W1TS_W::new(self, 10)
19    }
20}
21#[doc = "RTC GPIO output enable bit set register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`enable_w1ts::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
22pub struct ENABLE_W1TS_SPEC;
23impl crate::RegisterSpec for ENABLE_W1TS_SPEC {
24    type Ux = u32;
25}
26#[doc = "`write(|w| ..)` method takes [`enable_w1ts::W`](W) writer structure"]
27impl crate::Writable for ENABLE_W1TS_SPEC {
28    type Safety = crate::Unsafe;
29    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
30    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
31}
32#[doc = "`reset()` method sets ENABLE_W1TS to value 0"]
33impl crate::Resettable for ENABLE_W1TS_SPEC {
34    const RESET_VALUE: u32 = 0;
35}
esp32s2_ulp/rtc_io/enable_w1ts.rs

esp32s2_ulp/rtc_io/
enable_w1ts.rs
