esp32p4/timg0/
wdtconfig5.rs

1#[doc = "Register `WDTCONFIG5` reader"]
2pub type R = crate::R<WDTCONFIG5_SPEC>;
3#[doc = "Register `WDTCONFIG5` writer"]
4pub type W = crate::W<WDTCONFIG5_SPEC>;
5#[doc = "Field `WDT_STG3_HOLD` reader - Stage 3 timeout value, in MWDT clock cycles."]
6pub type WDT_STG3_HOLD_R = crate::FieldReader<u32>;
7#[doc = "Field `WDT_STG3_HOLD` writer - Stage 3 timeout value, in MWDT clock cycles."]
8pub type WDT_STG3_HOLD_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
9impl R {
10    #[doc = "Bits 0:31 - Stage 3 timeout value, in MWDT clock cycles."]
11    #[inline(always)]
12    pub fn wdt_stg3_hold(&self) -> WDT_STG3_HOLD_R {
13        WDT_STG3_HOLD_R::new(self.bits)
14    }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("WDTCONFIG5")
20            .field(
21                "wdt_stg3_hold",
22                &format_args!("{}", self.wdt_stg3_hold().bits()),
23            )
24            .finish()
25    }
26}
27#[cfg(feature = "impl-register-debug")]
28impl core::fmt::Debug for crate::generic::Reg<WDTCONFIG5_SPEC> {
29    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
30        core::fmt::Debug::fmt(&self.read(), f)
31    }
32}
33impl W {
34    #[doc = "Bits 0:31 - Stage 3 timeout value, in MWDT clock cycles."]
35    #[inline(always)]
36    #[must_use]
37    pub fn wdt_stg3_hold(&mut self) -> WDT_STG3_HOLD_W<WDTCONFIG5_SPEC> {
38        WDT_STG3_HOLD_W::new(self, 0)
39    }
40}
41#[doc = "Watchdog timer stage 3 timeout value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdtconfig5::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdtconfig5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
42pub struct WDTCONFIG5_SPEC;
43impl crate::RegisterSpec for WDTCONFIG5_SPEC {
44    type Ux = u32;
45}
46#[doc = "`read()` method returns [`wdtconfig5::R`](R) reader structure"]
47impl crate::Readable for WDTCONFIG5_SPEC {}
48#[doc = "`write(|w| ..)` method takes [`wdtconfig5::W`](W) writer structure"]
49impl crate::Writable for WDTCONFIG5_SPEC {
50    type Safety = crate::Unsafe;
51    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
52    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
53}
54#[doc = "`reset()` method sets WDTCONFIG5 to value 0x000f_ffff"]
55impl crate::Resettable for WDTCONFIG5_SPEC {
56    const RESET_VALUE: u32 = 0x000f_ffff;
57}
esp32p4/timg0/wdtconfig5.rs

esp32p4/timg0/
wdtconfig5.rs
