esp32p4/mipi_dsi_bridge/
dpi_v_cfg1.rs

1#[doc = "Register `DPI_V_CFG1` reader"]
2pub type R = crate::R<DPI_V_CFG1_SPEC>;
3#[doc = "Register `DPI_V_CFG1` writer"]
4pub type W = crate::W<DPI_V_CFG1_SPEC>;
5#[doc = "Field `VBANK` reader - this field configures the length between vsync and valid line (by line) for dpi output"]
6pub type VBANK_R = crate::FieldReader<u16>;
7#[doc = "Field `VBANK` writer - this field configures the length between vsync and valid line (by line) for dpi output"]
8pub type VBANK_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>;
9#[doc = "Field `VSYNC` reader - this field configures the length of vsync (by line) for dpi output"]
10pub type VSYNC_R = crate::FieldReader<u16>;
11#[doc = "Field `VSYNC` writer - this field configures the length of vsync (by line) for dpi output"]
12pub type VSYNC_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>;
13impl R {
14    #[doc = "Bits 0:11 - this field configures the length between vsync and valid line (by line) for dpi output"]
15    #[inline(always)]
16    pub fn vbank(&self) -> VBANK_R {
17        VBANK_R::new((self.bits & 0x0fff) as u16)
18    }
19    #[doc = "Bits 16:27 - this field configures the length of vsync (by line) for dpi output"]
20    #[inline(always)]
21    pub fn vsync(&self) -> VSYNC_R {
22        VSYNC_R::new(((self.bits >> 16) & 0x0fff) as u16)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("DPI_V_CFG1")
29            .field("vbank", &format_args!("{}", self.vbank().bits()))
30            .field("vsync", &format_args!("{}", self.vsync().bits()))
31            .finish()
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for crate::generic::Reg<DPI_V_CFG1_SPEC> {
36    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
37        core::fmt::Debug::fmt(&self.read(), f)
38    }
39}
40impl W {
41    #[doc = "Bits 0:11 - this field configures the length between vsync and valid line (by line) for dpi output"]
42    #[inline(always)]
43    #[must_use]
44    pub fn vbank(&mut self) -> VBANK_W<DPI_V_CFG1_SPEC> {
45        VBANK_W::new(self, 0)
46    }
47    #[doc = "Bits 16:27 - this field configures the length of vsync (by line) for dpi output"]
48    #[inline(always)]
49    #[must_use]
50    pub fn vsync(&mut self) -> VSYNC_W<DPI_V_CFG1_SPEC> {
51        VSYNC_W::new(self, 16)
52    }
53}
54#[doc = "dsi bridge dpi v config register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dpi_v_cfg1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dpi_v_cfg1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
55pub struct DPI_V_CFG1_SPEC;
56impl crate::RegisterSpec for DPI_V_CFG1_SPEC {
57    type Ux = u32;
58}
59#[doc = "`read()` method returns [`dpi_v_cfg1::R`](R) reader structure"]
60impl crate::Readable for DPI_V_CFG1_SPEC {}
61#[doc = "`write(|w| ..)` method takes [`dpi_v_cfg1::W`](W) writer structure"]
62impl crate::Writable for DPI_V_CFG1_SPEC {
63    type Safety = crate::Unsafe;
64    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
65    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
66}
67#[doc = "`reset()` method sets DPI_V_CFG1 to value 0x0002_0021"]
68impl crate::Resettable for DPI_V_CFG1_SPEC {
69    const RESET_VALUE: u32 = 0x0002_0021;
70}
esp32p4/mipi_dsi_bridge/dpi_v_cfg1.rs

esp32p4/mipi_dsi_bridge/
dpi_v_cfg1.rs
