esp32p4/lp_adc/
meas2_mux.rs

1#[doc = "Register `MEAS2_MUX` reader"]
2pub type R = crate::R<MEAS2_MUX_SPEC>;
3#[doc = "Register `MEAS2_MUX` writer"]
4pub type W = crate::W<MEAS2_MUX_SPEC>;
5#[doc = "Field `SAR2_PWDET_CCT` reader - SAR2_PWDET_CCT."]
6pub type SAR2_PWDET_CCT_R = crate::FieldReader;
7#[doc = "Field `SAR2_PWDET_CCT` writer - SAR2_PWDET_CCT."]
8pub type SAR2_PWDET_CCT_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
9#[doc = "Field `SAR2_RTC_FORCE` reader - In sleep, force to use rtc to control ADC."]
10pub type SAR2_RTC_FORCE_R = crate::BitReader;
11#[doc = "Field `SAR2_RTC_FORCE` writer - In sleep, force to use rtc to control ADC."]
12pub type SAR2_RTC_FORCE_W<'a, REG> = crate::BitWriter<'a, REG>;
13impl R {
14    #[doc = "Bits 28:30 - SAR2_PWDET_CCT."]
15    #[inline(always)]
16    pub fn sar2_pwdet_cct(&self) -> SAR2_PWDET_CCT_R {
17        SAR2_PWDET_CCT_R::new(((self.bits >> 28) & 7) as u8)
18    }
19    #[doc = "Bit 31 - In sleep, force to use rtc to control ADC."]
20    #[inline(always)]
21    pub fn sar2_rtc_force(&self) -> SAR2_RTC_FORCE_R {
22        SAR2_RTC_FORCE_R::new(((self.bits >> 31) & 1) != 0)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("MEAS2_MUX")
29            .field(
30                "sar2_pwdet_cct",
31                &format_args!("{}", self.sar2_pwdet_cct().bits()),
32            )
33            .field(
34                "sar2_rtc_force",
35                &format_args!("{}", self.sar2_rtc_force().bit()),
36            )
37            .finish()
38    }
39}
40#[cfg(feature = "impl-register-debug")]
41impl core::fmt::Debug for crate::generic::Reg<MEAS2_MUX_SPEC> {
42    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
43        core::fmt::Debug::fmt(&self.read(), f)
44    }
45}
46impl W {
47    #[doc = "Bits 28:30 - SAR2_PWDET_CCT."]
48    #[inline(always)]
49    #[must_use]
50    pub fn sar2_pwdet_cct(&mut self) -> SAR2_PWDET_CCT_W<MEAS2_MUX_SPEC> {
51        SAR2_PWDET_CCT_W::new(self, 28)
52    }
53    #[doc = "Bit 31 - In sleep, force to use rtc to control ADC."]
54    #[inline(always)]
55    #[must_use]
56    pub fn sar2_rtc_force(&mut self) -> SAR2_RTC_FORCE_W<MEAS2_MUX_SPEC> {
57        SAR2_RTC_FORCE_W::new(self, 31)
58    }
59}
60#[doc = "SAR ADC2 MUX register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`meas2_mux::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`meas2_mux::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
61pub struct MEAS2_MUX_SPEC;
62impl crate::RegisterSpec for MEAS2_MUX_SPEC {
63    type Ux = u32;
64}
65#[doc = "`read()` method returns [`meas2_mux::R`](R) reader structure"]
66impl crate::Readable for MEAS2_MUX_SPEC {}
67#[doc = "`write(|w| ..)` method takes [`meas2_mux::W`](W) writer structure"]
68impl crate::Writable for MEAS2_MUX_SPEC {
69    type Safety = crate::Unsafe;
70    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
71    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
72}
73#[doc = "`reset()` method sets MEAS2_MUX to value 0"]
74impl crate::Resettable for MEAS2_MUX_SPEC {
75    const RESET_VALUE: u32 = 0;
76}
esp32p4/lp_adc/meas2_mux.rs

esp32p4/lp_adc/
meas2_mux.rs
