esp32p4/isp/
mem_aux_ctrl_0.rs

1#[doc = "Register `MEM_AUX_CTRL_0` reader"]
2pub type R = crate::R<MEM_AUX_CTRL_0_SPEC>;
3#[doc = "Register `MEM_AUX_CTRL_0` writer"]
4pub type W = crate::W<MEM_AUX_CTRL_0_SPEC>;
5#[doc = "Field `HEADER_MEM_AUX_CTRL` reader - this field configures the mem_aux of isp input buffer memory"]
6pub type HEADER_MEM_AUX_CTRL_R = crate::FieldReader<u16>;
7#[doc = "Field `HEADER_MEM_AUX_CTRL` writer - this field configures the mem_aux of isp input buffer memory"]
8pub type HEADER_MEM_AUX_CTRL_W<'a, REG> = crate::FieldWriter<'a, REG, 14, u16>;
9#[doc = "Field `DPC_LUT_MEM_AUX_CTRL` reader - this field represents this field configures the mem_aux of dpc lut memory"]
10pub type DPC_LUT_MEM_AUX_CTRL_R = crate::FieldReader<u16>;
11#[doc = "Field `DPC_LUT_MEM_AUX_CTRL` writer - this field represents this field configures the mem_aux of dpc lut memory"]
12pub type DPC_LUT_MEM_AUX_CTRL_W<'a, REG> = crate::FieldWriter<'a, REG, 14, u16>;
13impl R {
14    #[doc = "Bits 0:13 - this field configures the mem_aux of isp input buffer memory"]
15    #[inline(always)]
16    pub fn header_mem_aux_ctrl(&self) -> HEADER_MEM_AUX_CTRL_R {
17        HEADER_MEM_AUX_CTRL_R::new((self.bits & 0x3fff) as u16)
18    }
19    #[doc = "Bits 16:29 - this field represents this field configures the mem_aux of dpc lut memory"]
20    #[inline(always)]
21    pub fn dpc_lut_mem_aux_ctrl(&self) -> DPC_LUT_MEM_AUX_CTRL_R {
22        DPC_LUT_MEM_AUX_CTRL_R::new(((self.bits >> 16) & 0x3fff) as u16)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("MEM_AUX_CTRL_0")
29            .field(
30                "header_mem_aux_ctrl",
31                &format_args!("{}", self.header_mem_aux_ctrl().bits()),
32            )
33            .field(
34                "dpc_lut_mem_aux_ctrl",
35                &format_args!("{}", self.dpc_lut_mem_aux_ctrl().bits()),
36            )
37            .finish()
38    }
39}
40#[cfg(feature = "impl-register-debug")]
41impl core::fmt::Debug for crate::generic::Reg<MEM_AUX_CTRL_0_SPEC> {
42    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
43        core::fmt::Debug::fmt(&self.read(), f)
44    }
45}
46impl W {
47    #[doc = "Bits 0:13 - this field configures the mem_aux of isp input buffer memory"]
48    #[inline(always)]
49    #[must_use]
50    pub fn header_mem_aux_ctrl(&mut self) -> HEADER_MEM_AUX_CTRL_W<MEM_AUX_CTRL_0_SPEC> {
51        HEADER_MEM_AUX_CTRL_W::new(self, 0)
52    }
53    #[doc = "Bits 16:29 - this field represents this field configures the mem_aux of dpc lut memory"]
54    #[inline(always)]
55    #[must_use]
56    pub fn dpc_lut_mem_aux_ctrl(&mut self) -> DPC_LUT_MEM_AUX_CTRL_W<MEM_AUX_CTRL_0_SPEC> {
57        DPC_LUT_MEM_AUX_CTRL_W::new(self, 16)
58    }
59}
60#[doc = "mem aux control register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mem_aux_ctrl_0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mem_aux_ctrl_0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
61pub struct MEM_AUX_CTRL_0_SPEC;
62impl crate::RegisterSpec for MEM_AUX_CTRL_0_SPEC {
63    type Ux = u32;
64}
65#[doc = "`read()` method returns [`mem_aux_ctrl_0::R`](R) reader structure"]
66impl crate::Readable for MEM_AUX_CTRL_0_SPEC {}
67#[doc = "`write(|w| ..)` method takes [`mem_aux_ctrl_0::W`](W) writer structure"]
68impl crate::Writable for MEM_AUX_CTRL_0_SPEC {
69    type Safety = crate::Unsafe;
70    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
71    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
72}
73#[doc = "`reset()` method sets MEM_AUX_CTRL_0 to value 0x1320_1320"]
74impl crate::Resettable for MEM_AUX_CTRL_0_SPEC {
75    const RESET_VALUE: u32 = 0x1320_1320;
76}
esp32p4/isp/mem_aux_ctrl_0.rs

esp32p4/isp/
mem_aux_ctrl_0.rs
