esp32p4/isp/
blc_ctrl2.rs

1#[doc = "Register `BLC_CTRL2` reader"]
2pub type R = crate::R<BLC_CTRL2_SPEC>;
3#[doc = "Register `BLC_CTRL2` writer"]
4pub type W = crate::W<BLC_CTRL2_SPEC>;
5#[doc = "Field `BLC_R3_TH` reader - this field configures black threshold when get blc average of bottom right channel"]
6pub type BLC_R3_TH_R = crate::FieldReader;
7#[doc = "Field `BLC_R3_TH` writer - this field configures black threshold when get blc average of bottom right channel"]
8pub type BLC_R3_TH_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `BLC_R2_TH` reader - this field configures black threshold when get blc average of bottom left channel"]
10pub type BLC_R2_TH_R = crate::FieldReader;
11#[doc = "Field `BLC_R2_TH` writer - this field configures black threshold when get blc average of bottom left channel"]
12pub type BLC_R2_TH_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13#[doc = "Field `BLC_R1_TH` reader - this field configures black threshold when get blc average of top right channel"]
14pub type BLC_R1_TH_R = crate::FieldReader;
15#[doc = "Field `BLC_R1_TH` writer - this field configures black threshold when get blc average of top right channel"]
16pub type BLC_R1_TH_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
17#[doc = "Field `BLC_R0_TH` reader - this field configures black threshold when get blc average of top left channel"]
18pub type BLC_R0_TH_R = crate::FieldReader;
19#[doc = "Field `BLC_R0_TH` writer - this field configures black threshold when get blc average of top left channel"]
20pub type BLC_R0_TH_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
21impl R {
22    #[doc = "Bits 0:7 - this field configures black threshold when get blc average of bottom right channel"]
23    #[inline(always)]
24    pub fn blc_r3_th(&self) -> BLC_R3_TH_R {
25        BLC_R3_TH_R::new((self.bits & 0xff) as u8)
26    }
27    #[doc = "Bits 8:15 - this field configures black threshold when get blc average of bottom left channel"]
28    #[inline(always)]
29    pub fn blc_r2_th(&self) -> BLC_R2_TH_R {
30        BLC_R2_TH_R::new(((self.bits >> 8) & 0xff) as u8)
31    }
32    #[doc = "Bits 16:23 - this field configures black threshold when get blc average of top right channel"]
33    #[inline(always)]
34    pub fn blc_r1_th(&self) -> BLC_R1_TH_R {
35        BLC_R1_TH_R::new(((self.bits >> 16) & 0xff) as u8)
36    }
37    #[doc = "Bits 24:31 - this field configures black threshold when get blc average of top left channel"]
38    #[inline(always)]
39    pub fn blc_r0_th(&self) -> BLC_R0_TH_R {
40        BLC_R0_TH_R::new(((self.bits >> 24) & 0xff) as u8)
41    }
42}
43#[cfg(feature = "impl-register-debug")]
44impl core::fmt::Debug for R {
45    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
46        f.debug_struct("BLC_CTRL2")
47            .field("blc_r3_th", &format_args!("{}", self.blc_r3_th().bits()))
48            .field("blc_r2_th", &format_args!("{}", self.blc_r2_th().bits()))
49            .field("blc_r1_th", &format_args!("{}", self.blc_r1_th().bits()))
50            .field("blc_r0_th", &format_args!("{}", self.blc_r0_th().bits()))
51            .finish()
52    }
53}
54#[cfg(feature = "impl-register-debug")]
55impl core::fmt::Debug for crate::generic::Reg<BLC_CTRL2_SPEC> {
56    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
57        core::fmt::Debug::fmt(&self.read(), f)
58    }
59}
60impl W {
61    #[doc = "Bits 0:7 - this field configures black threshold when get blc average of bottom right channel"]
62    #[inline(always)]
63    #[must_use]
64    pub fn blc_r3_th(&mut self) -> BLC_R3_TH_W<BLC_CTRL2_SPEC> {
65        BLC_R3_TH_W::new(self, 0)
66    }
67    #[doc = "Bits 8:15 - this field configures black threshold when get blc average of bottom left channel"]
68    #[inline(always)]
69    #[must_use]
70    pub fn blc_r2_th(&mut self) -> BLC_R2_TH_W<BLC_CTRL2_SPEC> {
71        BLC_R2_TH_W::new(self, 8)
72    }
73    #[doc = "Bits 16:23 - this field configures black threshold when get blc average of top right channel"]
74    #[inline(always)]
75    #[must_use]
76    pub fn blc_r1_th(&mut self) -> BLC_R1_TH_W<BLC_CTRL2_SPEC> {
77        BLC_R1_TH_W::new(self, 16)
78    }
79    #[doc = "Bits 24:31 - this field configures black threshold when get blc average of top left channel"]
80    #[inline(always)]
81    #[must_use]
82    pub fn blc_r0_th(&mut self) -> BLC_R0_TH_W<BLC_CTRL2_SPEC> {
83        BLC_R0_TH_W::new(self, 24)
84    }
85}
86#[doc = "blc black threshold control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`blc_ctrl2::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`blc_ctrl2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
87pub struct BLC_CTRL2_SPEC;
88impl crate::RegisterSpec for BLC_CTRL2_SPEC {
89    type Ux = u32;
90}
91#[doc = "`read()` method returns [`blc_ctrl2::R`](R) reader structure"]
92impl crate::Readable for BLC_CTRL2_SPEC {}
93#[doc = "`write(|w| ..)` method takes [`blc_ctrl2::W`](W) writer structure"]
94impl crate::Writable for BLC_CTRL2_SPEC {
95    type Safety = crate::Unsafe;
96    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
97    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
98}
99#[doc = "`reset()` method sets BLC_CTRL2 to value 0"]
100impl crate::Resettable for BLC_CTRL2_SPEC {
101    const RESET_VALUE: u32 = 0;
102}
esp32p4/isp/blc_ctrl2.rs

esp32p4/isp/
blc_ctrl2.rs
