esp32p4/i2c0/
scl_high_period.rs

1#[doc = "Register `SCL_HIGH_PERIOD` reader"]
2pub type R = crate::R<SCL_HIGH_PERIOD_SPEC>;
3#[doc = "Register `SCL_HIGH_PERIOD` writer"]
4pub type W = crate::W<SCL_HIGH_PERIOD_SPEC>;
5#[doc = "Field `SCL_HIGH_PERIOD` reader - Configures for how long SCL remains high in master mode. Measurement unit: i2c_sclk"]
6pub type SCL_HIGH_PERIOD_R = crate::FieldReader<u16>;
7#[doc = "Field `SCL_HIGH_PERIOD` writer - Configures for how long SCL remains high in master mode. Measurement unit: i2c_sclk"]
8pub type SCL_HIGH_PERIOD_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
9#[doc = "Field `SCL_WAIT_HIGH_PERIOD` reader - Configures the SCL_FSM's waiting period for SCL high level in master mode. Measurement unit: i2c_sclk"]
10pub type SCL_WAIT_HIGH_PERIOD_R = crate::FieldReader;
11#[doc = "Field `SCL_WAIT_HIGH_PERIOD` writer - Configures the SCL_FSM's waiting period for SCL high level in master mode. Measurement unit: i2c_sclk"]
12pub type SCL_WAIT_HIGH_PERIOD_W<'a, REG> = crate::FieldWriter<'a, REG, 7>;
13impl R {
14    #[doc = "Bits 0:8 - Configures for how long SCL remains high in master mode. Measurement unit: i2c_sclk"]
15    #[inline(always)]
16    pub fn scl_high_period(&self) -> SCL_HIGH_PERIOD_R {
17        SCL_HIGH_PERIOD_R::new((self.bits & 0x01ff) as u16)
18    }
19    #[doc = "Bits 9:15 - Configures the SCL_FSM's waiting period for SCL high level in master mode. Measurement unit: i2c_sclk"]
20    #[inline(always)]
21    pub fn scl_wait_high_period(&self) -> SCL_WAIT_HIGH_PERIOD_R {
22        SCL_WAIT_HIGH_PERIOD_R::new(((self.bits >> 9) & 0x7f) as u8)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("SCL_HIGH_PERIOD")
29            .field(
30                "scl_high_period",
31                &format_args!("{}", self.scl_high_period().bits()),
32            )
33            .field(
34                "scl_wait_high_period",
35                &format_args!("{}", self.scl_wait_high_period().bits()),
36            )
37            .finish()
38    }
39}
40#[cfg(feature = "impl-register-debug")]
41impl core::fmt::Debug for crate::generic::Reg<SCL_HIGH_PERIOD_SPEC> {
42    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
43        core::fmt::Debug::fmt(&self.read(), f)
44    }
45}
46impl W {
47    #[doc = "Bits 0:8 - Configures for how long SCL remains high in master mode. Measurement unit: i2c_sclk"]
48    #[inline(always)]
49    #[must_use]
50    pub fn scl_high_period(&mut self) -> SCL_HIGH_PERIOD_W<SCL_HIGH_PERIOD_SPEC> {
51        SCL_HIGH_PERIOD_W::new(self, 0)
52    }
53    #[doc = "Bits 9:15 - Configures the SCL_FSM's waiting period for SCL high level in master mode. Measurement unit: i2c_sclk"]
54    #[inline(always)]
55    #[must_use]
56    pub fn scl_wait_high_period(&mut self) -> SCL_WAIT_HIGH_PERIOD_W<SCL_HIGH_PERIOD_SPEC> {
57        SCL_WAIT_HIGH_PERIOD_W::new(self, 9)
58    }
59}
60#[doc = "Configures the high level width of SCL\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`scl_high_period::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`scl_high_period::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
61pub struct SCL_HIGH_PERIOD_SPEC;
62impl crate::RegisterSpec for SCL_HIGH_PERIOD_SPEC {
63    type Ux = u32;
64}
65#[doc = "`read()` method returns [`scl_high_period::R`](R) reader structure"]
66impl crate::Readable for SCL_HIGH_PERIOD_SPEC {}
67#[doc = "`write(|w| ..)` method takes [`scl_high_period::W`](W) writer structure"]
68impl crate::Writable for SCL_HIGH_PERIOD_SPEC {
69    type Safety = crate::Unsafe;
70    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
71    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
72}
73#[doc = "`reset()` method sets SCL_HIGH_PERIOD to value 0"]
74impl crate::Resettable for SCL_HIGH_PERIOD_SPEC {
75    const RESET_VALUE: u32 = 0;
76}
esp32p4/i2c0/scl_high_period.rs

esp32p4/i2c0/
scl_high_period.rs
