esp32p4/ahb_dma/ch/
out_peri_sel.rs

1#[doc = "Register `OUT_PERI_SEL` reader"]
2pub type R = crate::R<OUT_PERI_SEL_SPEC>;
3#[doc = "Register `OUT_PERI_SEL` writer"]
4pub type W = crate::W<OUT_PERI_SEL_SPEC>;
5#[doc = "Field `PERI_OUT_SEL` reader - This register is used to select peripheral for Tx channel 0. I3C. 1: Dummy. 2: UHCI0. 3: I2S0. 4: I2S1. 5: I2S2. 6: Dummy. 7: Dummy. 8: ADC_DAC. 9: Dummy. 10: RMT,11~15: Dummy"]
6pub type PERI_OUT_SEL_R = crate::FieldReader;
7#[doc = "Field `PERI_OUT_SEL` writer - This register is used to select peripheral for Tx channel 0. I3C. 1: Dummy. 2: UHCI0. 3: I2S0. 4: I2S1. 5: I2S2. 6: Dummy. 7: Dummy. 8: ADC_DAC. 9: Dummy. 10: RMT,11~15: Dummy"]
8pub type PERI_OUT_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>;
9impl R {
10    #[doc = "Bits 0:5 - This register is used to select peripheral for Tx channel 0. I3C. 1: Dummy. 2: UHCI0. 3: I2S0. 4: I2S1. 5: I2S2. 6: Dummy. 7: Dummy. 8: ADC_DAC. 9: Dummy. 10: RMT,11~15: Dummy"]
11    #[inline(always)]
12    pub fn peri_out_sel(&self) -> PERI_OUT_SEL_R {
13        PERI_OUT_SEL_R::new((self.bits & 0x3f) as u8)
14    }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("OUT_PERI_SEL")
20            .field(
21                "peri_out_sel",
22                &format_args!("{}", self.peri_out_sel().bits()),
23            )
24            .finish()
25    }
26}
27#[cfg(feature = "impl-register-debug")]
28impl core::fmt::Debug for crate::generic::Reg<OUT_PERI_SEL_SPEC> {
29    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
30        core::fmt::Debug::fmt(&self.read(), f)
31    }
32}
33impl W {
34    #[doc = "Bits 0:5 - This register is used to select peripheral for Tx channel 0. I3C. 1: Dummy. 2: UHCI0. 3: I2S0. 4: I2S1. 5: I2S2. 6: Dummy. 7: Dummy. 8: ADC_DAC. 9: Dummy. 10: RMT,11~15: Dummy"]
35    #[inline(always)]
36    #[must_use]
37    pub fn peri_out_sel(&mut self) -> PERI_OUT_SEL_W<OUT_PERI_SEL_SPEC> {
38        PERI_OUT_SEL_W::new(self, 0)
39    }
40}
41#[doc = "Peripheral selection of Tx channel 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out_peri_sel::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out_peri_sel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
42pub struct OUT_PERI_SEL_SPEC;
43impl crate::RegisterSpec for OUT_PERI_SEL_SPEC {
44    type Ux = u32;
45}
46#[doc = "`read()` method returns [`out_peri_sel::R`](R) reader structure"]
47impl crate::Readable for OUT_PERI_SEL_SPEC {}
48#[doc = "`write(|w| ..)` method takes [`out_peri_sel::W`](W) writer structure"]
49impl crate::Writable for OUT_PERI_SEL_SPEC {
50    type Safety = crate::Unsafe;
51    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
52    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
53}
54#[doc = "`reset()` method sets OUT_PERI_SEL to value 0x3f"]
55impl crate::Resettable for OUT_PERI_SEL_SPEC {
56    const RESET_VALUE: u32 = 0x3f;
57}
esp32p4/ahb_dma/ch/out_peri_sel.rs

esp32p4/ahb_dma/ch/
out_peri_sel.rs
