1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 cmd: CMD,
6 addr: ADDR,
7 ctrl: CTRL,
8 clock: CLOCK,
9 user: USER,
10 user1: USER1,
11 user2: USER2,
12 ms_dlen: MS_DLEN,
13 misc: MISC,
14 din_mode: DIN_MODE,
15 din_num: DIN_NUM,
16 dout_mode: DOUT_MODE,
17 dma_conf: DMA_CONF,
18 dma_int_ena: DMA_INT_ENA,
19 dma_int_clr: DMA_INT_CLR,
20 dma_int_raw: DMA_INT_RAW,
21 dma_int_st: DMA_INT_ST,
22 dma_int_set: DMA_INT_SET,
23 _reserved18: [u8; 0x50],
24 w0: W0,
25 w1: W1,
26 w2: W2,
27 w3: W3,
28 w4: W4,
29 w5: W5,
30 w6: W6,
31 w7: W7,
32 w8: W8,
33 w9: W9,
34 w10: W10,
35 w11: W11,
36 w12: W12,
37 w13: W13,
38 w14: W14,
39 w15: W15,
40 _reserved34: [u8; 0x08],
41 slave: SLAVE,
42 slave1: SLAVE1,
43 clk_gate: CLK_GATE,
44 _reserved37: [u8; 0x04],
45 date: DATE,
46}
47impl RegisterBlock {
48 #[doc = "0x00 - Command control register"]
49 #[inline(always)]
50 pub const fn cmd(&self) -> &CMD {
51 &self.cmd
52 }
53 #[doc = "0x04 - Address value register"]
54 #[inline(always)]
55 pub const fn addr(&self) -> &ADDR {
56 &self.addr
57 }
58 #[doc = "0x08 - SPI control register"]
59 #[inline(always)]
60 pub const fn ctrl(&self) -> &CTRL {
61 &self.ctrl
62 }
63 #[doc = "0x0c - SPI clock control register"]
64 #[inline(always)]
65 pub const fn clock(&self) -> &CLOCK {
66 &self.clock
67 }
68 #[doc = "0x10 - SPI USER control register"]
69 #[inline(always)]
70 pub const fn user(&self) -> &USER {
71 &self.user
72 }
73 #[doc = "0x14 - SPI USER control register 1"]
74 #[inline(always)]
75 pub const fn user1(&self) -> &USER1 {
76 &self.user1
77 }
78 #[doc = "0x18 - SPI USER control register 2"]
79 #[inline(always)]
80 pub const fn user2(&self) -> &USER2 {
81 &self.user2
82 }
83 #[doc = "0x1c - SPI data bit length control register"]
84 #[inline(always)]
85 pub const fn ms_dlen(&self) -> &MS_DLEN {
86 &self.ms_dlen
87 }
88 #[doc = "0x20 - SPI misc register"]
89 #[inline(always)]
90 pub const fn misc(&self) -> &MISC {
91 &self.misc
92 }
93 #[doc = "0x24 - SPI input delay mode configuration"]
94 #[inline(always)]
95 pub const fn din_mode(&self) -> &DIN_MODE {
96 &self.din_mode
97 }
98 #[doc = "0x28 - SPI input delay number configuration"]
99 #[inline(always)]
100 pub const fn din_num(&self) -> &DIN_NUM {
101 &self.din_num
102 }
103 #[doc = "0x2c - SPI output delay mode configuration"]
104 #[inline(always)]
105 pub const fn dout_mode(&self) -> &DOUT_MODE {
106 &self.dout_mode
107 }
108 #[doc = "0x30 - SPI DMA control register"]
109 #[inline(always)]
110 pub const fn dma_conf(&self) -> &DMA_CONF {
111 &self.dma_conf
112 }
113 #[doc = "0x34 - SPI interrupt enable register"]
114 #[inline(always)]
115 pub const fn dma_int_ena(&self) -> &DMA_INT_ENA {
116 &self.dma_int_ena
117 }
118 #[doc = "0x38 - SPI interrupt clear register"]
119 #[inline(always)]
120 pub const fn dma_int_clr(&self) -> &DMA_INT_CLR {
121 &self.dma_int_clr
122 }
123 #[doc = "0x3c - SPI interrupt raw register"]
124 #[inline(always)]
125 pub const fn dma_int_raw(&self) -> &DMA_INT_RAW {
126 &self.dma_int_raw
127 }
128 #[doc = "0x40 - SPI interrupt status register"]
129 #[inline(always)]
130 pub const fn dma_int_st(&self) -> &DMA_INT_ST {
131 &self.dma_int_st
132 }
133 #[doc = "0x44 - SPI interrupt software set register"]
134 #[inline(always)]
135 pub const fn dma_int_set(&self) -> &DMA_INT_SET {
136 &self.dma_int_set
137 }
138 #[doc = "0x98 - SPI CPU-controlled buffer0"]
139 #[inline(always)]
140 pub const fn w0(&self) -> &W0 {
141 &self.w0
142 }
143 #[doc = "0x9c - SPI CPU-controlled buffer1"]
144 #[inline(always)]
145 pub const fn w1(&self) -> &W1 {
146 &self.w1
147 }
148 #[doc = "0xa0 - SPI CPU-controlled buffer2"]
149 #[inline(always)]
150 pub const fn w2(&self) -> &W2 {
151 &self.w2
152 }
153 #[doc = "0xa4 - SPI CPU-controlled buffer3"]
154 #[inline(always)]
155 pub const fn w3(&self) -> &W3 {
156 &self.w3
157 }
158 #[doc = "0xa8 - SPI CPU-controlled buffer4"]
159 #[inline(always)]
160 pub const fn w4(&self) -> &W4 {
161 &self.w4
162 }
163 #[doc = "0xac - SPI CPU-controlled buffer5"]
164 #[inline(always)]
165 pub const fn w5(&self) -> &W5 {
166 &self.w5
167 }
168 #[doc = "0xb0 - SPI CPU-controlled buffer6"]
169 #[inline(always)]
170 pub const fn w6(&self) -> &W6 {
171 &self.w6
172 }
173 #[doc = "0xb4 - SPI CPU-controlled buffer7"]
174 #[inline(always)]
175 pub const fn w7(&self) -> &W7 {
176 &self.w7
177 }
178 #[doc = "0xb8 - SPI CPU-controlled buffer8"]
179 #[inline(always)]
180 pub const fn w8(&self) -> &W8 {
181 &self.w8
182 }
183 #[doc = "0xbc - SPI CPU-controlled buffer9"]
184 #[inline(always)]
185 pub const fn w9(&self) -> &W9 {
186 &self.w9
187 }
188 #[doc = "0xc0 - SPI CPU-controlled buffer10"]
189 #[inline(always)]
190 pub const fn w10(&self) -> &W10 {
191 &self.w10
192 }
193 #[doc = "0xc4 - SPI CPU-controlled buffer11"]
194 #[inline(always)]
195 pub const fn w11(&self) -> &W11 {
196 &self.w11
197 }
198 #[doc = "0xc8 - SPI CPU-controlled buffer12"]
199 #[inline(always)]
200 pub const fn w12(&self) -> &W12 {
201 &self.w12
202 }
203 #[doc = "0xcc - SPI CPU-controlled buffer13"]
204 #[inline(always)]
205 pub const fn w13(&self) -> &W13 {
206 &self.w13
207 }
208 #[doc = "0xd0 - SPI CPU-controlled buffer14"]
209 #[inline(always)]
210 pub const fn w14(&self) -> &W14 {
211 &self.w14
212 }
213 #[doc = "0xd4 - SPI CPU-controlled buffer15"]
214 #[inline(always)]
215 pub const fn w15(&self) -> &W15 {
216 &self.w15
217 }
218 #[doc = "0xe0 - SPI slave control register"]
219 #[inline(always)]
220 pub const fn slave(&self) -> &SLAVE {
221 &self.slave
222 }
223 #[doc = "0xe4 - SPI slave control register 1"]
224 #[inline(always)]
225 pub const fn slave1(&self) -> &SLAVE1 {
226 &self.slave1
227 }
228 #[doc = "0xe8 - SPI module clock and register clock control"]
229 #[inline(always)]
230 pub const fn clk_gate(&self) -> &CLK_GATE {
231 &self.clk_gate
232 }
233 #[doc = "0xf0 - Version control"]
234 #[inline(always)]
235 pub const fn date(&self) -> &DATE {
236 &self.date
237 }
238}
239#[doc = "CMD (rw) register accessor: Command control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmd::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] module"]
240pub type CMD = crate::Reg<cmd::CMD_SPEC>;
241#[doc = "Command control register"]
242pub mod cmd;
243#[doc = "ADDR (rw) register accessor: Address value register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`addr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`addr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr`] module"]
244pub type ADDR = crate::Reg<addr::ADDR_SPEC>;
245#[doc = "Address value register"]
246pub mod addr;
247#[doc = "CTRL (rw) register accessor: SPI control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] module"]
248pub type CTRL = crate::Reg<ctrl::CTRL_SPEC>;
249#[doc = "SPI control register"]
250pub mod ctrl;
251#[doc = "CLOCK (rw) register accessor: SPI clock control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clock::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clock::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clock`] module"]
252pub type CLOCK = crate::Reg<clock::CLOCK_SPEC>;
253#[doc = "SPI clock control register"]
254pub mod clock;
255#[doc = "USER (rw) register accessor: SPI USER control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`user::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`user::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@user`] module"]
256pub type USER = crate::Reg<user::USER_SPEC>;
257#[doc = "SPI USER control register"]
258pub mod user;
259#[doc = "USER1 (rw) register accessor: SPI USER control register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`user1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`user1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@user1`] module"]
260pub type USER1 = crate::Reg<user1::USER1_SPEC>;
261#[doc = "SPI USER control register 1"]
262pub mod user1;
263#[doc = "USER2 (rw) register accessor: SPI USER control register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`user2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`user2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@user2`] module"]
264pub type USER2 = crate::Reg<user2::USER2_SPEC>;
265#[doc = "SPI USER control register 2"]
266pub mod user2;
267#[doc = "MS_DLEN (rw) register accessor: SPI data bit length control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ms_dlen::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ms_dlen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ms_dlen`] module"]
268pub type MS_DLEN = crate::Reg<ms_dlen::MS_DLEN_SPEC>;
269#[doc = "SPI data bit length control register"]
270pub mod ms_dlen;
271#[doc = "MISC (rw) register accessor: SPI misc register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`misc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`misc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@misc`] module"]
272pub type MISC = crate::Reg<misc::MISC_SPEC>;
273#[doc = "SPI misc register"]
274pub mod misc;
275#[doc = "DIN_MODE (rw) register accessor: SPI input delay mode configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`din_mode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`din_mode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@din_mode`] module"]
276pub type DIN_MODE = crate::Reg<din_mode::DIN_MODE_SPEC>;
277#[doc = "SPI input delay mode configuration"]
278pub mod din_mode;
279#[doc = "DIN_NUM (rw) register accessor: SPI input delay number configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`din_num::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`din_num::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@din_num`] module"]
280pub type DIN_NUM = crate::Reg<din_num::DIN_NUM_SPEC>;
281#[doc = "SPI input delay number configuration"]
282pub mod din_num;
283#[doc = "DOUT_MODE (rw) register accessor: SPI output delay mode configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dout_mode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dout_mode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dout_mode`] module"]
284pub type DOUT_MODE = crate::Reg<dout_mode::DOUT_MODE_SPEC>;
285#[doc = "SPI output delay mode configuration"]
286pub mod dout_mode;
287#[doc = "DMA_CONF (rw) register accessor: SPI DMA control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_conf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_conf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_conf`] module"]
288pub type DMA_CONF = crate::Reg<dma_conf::DMA_CONF_SPEC>;
289#[doc = "SPI DMA control register"]
290pub mod dma_conf;
291#[doc = "DMA_INT_ENA (rw) register accessor: SPI interrupt enable register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_int_ena::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_int_ena::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_int_ena`] module"]
292pub type DMA_INT_ENA = crate::Reg<dma_int_ena::DMA_INT_ENA_SPEC>;
293#[doc = "SPI interrupt enable register"]
294pub mod dma_int_ena;
295#[doc = "DMA_INT_CLR (w) register accessor: SPI interrupt clear register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_int_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_int_clr`] module"]
296pub type DMA_INT_CLR = crate::Reg<dma_int_clr::DMA_INT_CLR_SPEC>;
297#[doc = "SPI interrupt clear register"]
298pub mod dma_int_clr;
299#[doc = "DMA_INT_RAW (rw) register accessor: SPI interrupt raw register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_int_raw::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_int_raw::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_int_raw`] module"]
300pub type DMA_INT_RAW = crate::Reg<dma_int_raw::DMA_INT_RAW_SPEC>;
301#[doc = "SPI interrupt raw register"]
302pub mod dma_int_raw;
303#[doc = "DMA_INT_ST (r) register accessor: SPI interrupt status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_int_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_int_st`] module"]
304pub type DMA_INT_ST = crate::Reg<dma_int_st::DMA_INT_ST_SPEC>;
305#[doc = "SPI interrupt status register"]
306pub mod dma_int_st;
307#[doc = "DMA_INT_SET (w) register accessor: SPI interrupt software set register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_int_set::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_int_set`] module"]
308pub type DMA_INT_SET = crate::Reg<dma_int_set::DMA_INT_SET_SPEC>;
309#[doc = "SPI interrupt software set register"]
310pub mod dma_int_set;
311#[doc = "W0 (rw) register accessor: SPI CPU-controlled buffer0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w0`] module"]
312pub type W0 = crate::Reg<w0::W0_SPEC>;
313#[doc = "SPI CPU-controlled buffer0"]
314pub mod w0;
315#[doc = "W1 (rw) register accessor: SPI CPU-controlled buffer1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w1`] module"]
316pub type W1 = crate::Reg<w1::W1_SPEC>;
317#[doc = "SPI CPU-controlled buffer1"]
318pub mod w1;
319#[doc = "W2 (rw) register accessor: SPI CPU-controlled buffer2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w2`] module"]
320pub type W2 = crate::Reg<w2::W2_SPEC>;
321#[doc = "SPI CPU-controlled buffer2"]
322pub mod w2;
323#[doc = "W3 (rw) register accessor: SPI CPU-controlled buffer3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w3`] module"]
324pub type W3 = crate::Reg<w3::W3_SPEC>;
325#[doc = "SPI CPU-controlled buffer3"]
326pub mod w3;
327#[doc = "W4 (rw) register accessor: SPI CPU-controlled buffer4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w4`] module"]
328pub type W4 = crate::Reg<w4::W4_SPEC>;
329#[doc = "SPI CPU-controlled buffer4"]
330pub mod w4;
331#[doc = "W5 (rw) register accessor: SPI CPU-controlled buffer5\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w5::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w5`] module"]
332pub type W5 = crate::Reg<w5::W5_SPEC>;
333#[doc = "SPI CPU-controlled buffer5"]
334pub mod w5;
335#[doc = "W6 (rw) register accessor: SPI CPU-controlled buffer6\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w6::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w6`] module"]
336pub type W6 = crate::Reg<w6::W6_SPEC>;
337#[doc = "SPI CPU-controlled buffer6"]
338pub mod w6;
339#[doc = "W7 (rw) register accessor: SPI CPU-controlled buffer7\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w7::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w7`] module"]
340pub type W7 = crate::Reg<w7::W7_SPEC>;
341#[doc = "SPI CPU-controlled buffer7"]
342pub mod w7;
343#[doc = "W8 (rw) register accessor: SPI CPU-controlled buffer8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w8`] module"]
344pub type W8 = crate::Reg<w8::W8_SPEC>;
345#[doc = "SPI CPU-controlled buffer8"]
346pub mod w8;
347#[doc = "W9 (rw) register accessor: SPI CPU-controlled buffer9\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w9::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w9`] module"]
348pub type W9 = crate::Reg<w9::W9_SPEC>;
349#[doc = "SPI CPU-controlled buffer9"]
350pub mod w9;
351#[doc = "W10 (rw) register accessor: SPI CPU-controlled buffer10\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w10::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w10`] module"]
352pub type W10 = crate::Reg<w10::W10_SPEC>;
353#[doc = "SPI CPU-controlled buffer10"]
354pub mod w10;
355#[doc = "W11 (rw) register accessor: SPI CPU-controlled buffer11\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w11::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w11`] module"]
356pub type W11 = crate::Reg<w11::W11_SPEC>;
357#[doc = "SPI CPU-controlled buffer11"]
358pub mod w11;
359#[doc = "W12 (rw) register accessor: SPI CPU-controlled buffer12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w12`] module"]
360pub type W12 = crate::Reg<w12::W12_SPEC>;
361#[doc = "SPI CPU-controlled buffer12"]
362pub mod w12;
363#[doc = "W13 (rw) register accessor: SPI CPU-controlled buffer13\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w13::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w13::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w13`] module"]
364pub type W13 = crate::Reg<w13::W13_SPEC>;
365#[doc = "SPI CPU-controlled buffer13"]
366pub mod w13;
367#[doc = "W14 (rw) register accessor: SPI CPU-controlled buffer14\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w14::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w14::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w14`] module"]
368pub type W14 = crate::Reg<w14::W14_SPEC>;
369#[doc = "SPI CPU-controlled buffer14"]
370pub mod w14;
371#[doc = "W15 (rw) register accessor: SPI CPU-controlled buffer15\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w15::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w15::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w15`] module"]
372pub type W15 = crate::Reg<w15::W15_SPEC>;
373#[doc = "SPI CPU-controlled buffer15"]
374pub mod w15;
375#[doc = "SLAVE (rw) register accessor: SPI slave control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`slave::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`slave::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@slave`] module"]
376pub type SLAVE = crate::Reg<slave::SLAVE_SPEC>;
377#[doc = "SPI slave control register"]
378pub mod slave;
379#[doc = "SLAVE1 (rw) register accessor: SPI slave control register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`slave1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`slave1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@slave1`] module"]
380pub type SLAVE1 = crate::Reg<slave1::SLAVE1_SPEC>;
381#[doc = "SPI slave control register 1"]
382pub mod slave1;
383#[doc = "CLK_GATE (rw) register accessor: SPI module clock and register clock control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clk_gate::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clk_gate::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clk_gate`] module"]
384pub type CLK_GATE = crate::Reg<clk_gate::CLK_GATE_SPEC>;
385#[doc = "SPI module clock and register clock control"]
386pub mod clk_gate;
387#[doc = "DATE (rw) register accessor: Version control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
388pub type DATE = crate::Reg<date::DATE_SPEC>;
389#[doc = "Version control"]
390pub mod date;