1#[doc = "Register `RX_CTRL` reader"]
2pub type R = crate::R<RX_CTRL_SPEC>;
3#[doc = "Register `RX_CTRL` writer"]
4pub type W = crate::W<RX_CTRL_SPEC>;
5#[doc = "Field `RX_ENA` reader - write this bit to enable the bitscrambler rx"]
6pub type RX_ENA_R = crate::BitReader;
7#[doc = "Field `RX_ENA` writer - write this bit to enable the bitscrambler rx"]
8pub type RX_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `RX_PAUSE` reader - write this bit to pause the bitscrambler rx core"]
10pub type RX_PAUSE_R = crate::BitReader;
11#[doc = "Field `RX_PAUSE` writer - write this bit to pause the bitscrambler rx core"]
12pub type RX_PAUSE_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `RX_HALT` reader - write this bit to halt the bitscrambler rx core"]
14pub type RX_HALT_R = crate::BitReader;
15#[doc = "Field `RX_HALT` writer - write this bit to halt the bitscrambler rx core"]
16pub type RX_HALT_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `RX_EOF_MODE` reader - write this bit to ser the bitscrambler rx core EOF signal generating mode which is combined with reg_bitscrambler_rx_tailing_bits, 0: counter by read peripheral buffer, 0 counter by write dma fifo"]
18pub type RX_EOF_MODE_R = crate::BitReader;
19#[doc = "Field `RX_EOF_MODE` writer - write this bit to ser the bitscrambler rx core EOF signal generating mode which is combined with reg_bitscrambler_rx_tailing_bits, 0: counter by read peripheral buffer, 0 counter by write dma fifo"]
20pub type RX_EOF_MODE_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `RX_COND_MODE` reader - write this bit to specify the LOOP instruction condition mode of bitscrambler rx core, 0: use the little than operator to get the condition, 1: use not equal operator to get the condition"]
22pub type RX_COND_MODE_R = crate::BitReader;
23#[doc = "Field `RX_COND_MODE` writer - write this bit to specify the LOOP instruction condition mode of bitscrambler rx core, 0: use the little than operator to get the condition, 1: use not equal operator to get the condition"]
24pub type RX_COND_MODE_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `RX_FETCH_MODE` reader - write this bit to set the bitscrambler rx core fetch instruction mode, 0: prefetch by reset, 1: fetch by instrutions"]
26pub type RX_FETCH_MODE_R = crate::BitReader;
27#[doc = "Field `RX_FETCH_MODE` writer - write this bit to set the bitscrambler rx core fetch instruction mode, 0: prefetch by reset, 1: fetch by instrutions"]
28pub type RX_FETCH_MODE_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `RX_HALT_MODE` reader - write this bit to set the bitscrambler rx core halt mode when rx_halt is set, 0: wait write data back done, , 1: ignore write data back"]
30pub type RX_HALT_MODE_R = crate::BitReader;
31#[doc = "Field `RX_HALT_MODE` writer - write this bit to set the bitscrambler rx core halt mode when rx_halt is set, 0: wait write data back done, , 1: ignore write data back"]
32pub type RX_HALT_MODE_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `RX_RD_DUMMY` reader - write this bit to set the bitscrambler rx core read data mode when EOF received.0: wait read data, 1: ignore read data"]
34pub type RX_RD_DUMMY_R = crate::BitReader;
35#[doc = "Field `RX_RD_DUMMY` writer - write this bit to set the bitscrambler rx core read data mode when EOF received.0: wait read data, 1: ignore read data"]
36pub type RX_RD_DUMMY_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `RX_FIFO_RST` writer - write this bit to reset the bitscrambler rx fifo"]
38pub type RX_FIFO_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
39impl R {
40 #[doc = "Bit 0 - write this bit to enable the bitscrambler rx"]
41 #[inline(always)]
42 pub fn rx_ena(&self) -> RX_ENA_R {
43 RX_ENA_R::new((self.bits & 1) != 0)
44 }
45 #[doc = "Bit 1 - write this bit to pause the bitscrambler rx core"]
46 #[inline(always)]
47 pub fn rx_pause(&self) -> RX_PAUSE_R {
48 RX_PAUSE_R::new(((self.bits >> 1) & 1) != 0)
49 }
50 #[doc = "Bit 2 - write this bit to halt the bitscrambler rx core"]
51 #[inline(always)]
52 pub fn rx_halt(&self) -> RX_HALT_R {
53 RX_HALT_R::new(((self.bits >> 2) & 1) != 0)
54 }
55 #[doc = "Bit 3 - write this bit to ser the bitscrambler rx core EOF signal generating mode which is combined with reg_bitscrambler_rx_tailing_bits, 0: counter by read peripheral buffer, 0 counter by write dma fifo"]
56 #[inline(always)]
57 pub fn rx_eof_mode(&self) -> RX_EOF_MODE_R {
58 RX_EOF_MODE_R::new(((self.bits >> 3) & 1) != 0)
59 }
60 #[doc = "Bit 4 - write this bit to specify the LOOP instruction condition mode of bitscrambler rx core, 0: use the little than operator to get the condition, 1: use not equal operator to get the condition"]
61 #[inline(always)]
62 pub fn rx_cond_mode(&self) -> RX_COND_MODE_R {
63 RX_COND_MODE_R::new(((self.bits >> 4) & 1) != 0)
64 }
65 #[doc = "Bit 5 - write this bit to set the bitscrambler rx core fetch instruction mode, 0: prefetch by reset, 1: fetch by instrutions"]
66 #[inline(always)]
67 pub fn rx_fetch_mode(&self) -> RX_FETCH_MODE_R {
68 RX_FETCH_MODE_R::new(((self.bits >> 5) & 1) != 0)
69 }
70 #[doc = "Bit 6 - write this bit to set the bitscrambler rx core halt mode when rx_halt is set, 0: wait write data back done, , 1: ignore write data back"]
71 #[inline(always)]
72 pub fn rx_halt_mode(&self) -> RX_HALT_MODE_R {
73 RX_HALT_MODE_R::new(((self.bits >> 6) & 1) != 0)
74 }
75 #[doc = "Bit 7 - write this bit to set the bitscrambler rx core read data mode when EOF received.0: wait read data, 1: ignore read data"]
76 #[inline(always)]
77 pub fn rx_rd_dummy(&self) -> RX_RD_DUMMY_R {
78 RX_RD_DUMMY_R::new(((self.bits >> 7) & 1) != 0)
79 }
80}
81#[cfg(feature = "impl-register-debug")]
82impl core::fmt::Debug for R {
83 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
84 f.debug_struct("RX_CTRL")
85 .field("rx_ena", &format_args!("{}", self.rx_ena().bit()))
86 .field("rx_pause", &format_args!("{}", self.rx_pause().bit()))
87 .field("rx_halt", &format_args!("{}", self.rx_halt().bit()))
88 .field("rx_eof_mode", &format_args!("{}", self.rx_eof_mode().bit()))
89 .field(
90 "rx_cond_mode",
91 &format_args!("{}", self.rx_cond_mode().bit()),
92 )
93 .field(
94 "rx_fetch_mode",
95 &format_args!("{}", self.rx_fetch_mode().bit()),
96 )
97 .field(
98 "rx_halt_mode",
99 &format_args!("{}", self.rx_halt_mode().bit()),
100 )
101 .field("rx_rd_dummy", &format_args!("{}", self.rx_rd_dummy().bit()))
102 .finish()
103 }
104}
105#[cfg(feature = "impl-register-debug")]
106impl core::fmt::Debug for crate::generic::Reg<RX_CTRL_SPEC> {
107 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
108 core::fmt::Debug::fmt(&self.read(), f)
109 }
110}
111impl W {
112 #[doc = "Bit 0 - write this bit to enable the bitscrambler rx"]
113 #[inline(always)]
114 #[must_use]
115 pub fn rx_ena(&mut self) -> RX_ENA_W<RX_CTRL_SPEC> {
116 RX_ENA_W::new(self, 0)
117 }
118 #[doc = "Bit 1 - write this bit to pause the bitscrambler rx core"]
119 #[inline(always)]
120 #[must_use]
121 pub fn rx_pause(&mut self) -> RX_PAUSE_W<RX_CTRL_SPEC> {
122 RX_PAUSE_W::new(self, 1)
123 }
124 #[doc = "Bit 2 - write this bit to halt the bitscrambler rx core"]
125 #[inline(always)]
126 #[must_use]
127 pub fn rx_halt(&mut self) -> RX_HALT_W<RX_CTRL_SPEC> {
128 RX_HALT_W::new(self, 2)
129 }
130 #[doc = "Bit 3 - write this bit to ser the bitscrambler rx core EOF signal generating mode which is combined with reg_bitscrambler_rx_tailing_bits, 0: counter by read peripheral buffer, 0 counter by write dma fifo"]
131 #[inline(always)]
132 #[must_use]
133 pub fn rx_eof_mode(&mut self) -> RX_EOF_MODE_W<RX_CTRL_SPEC> {
134 RX_EOF_MODE_W::new(self, 3)
135 }
136 #[doc = "Bit 4 - write this bit to specify the LOOP instruction condition mode of bitscrambler rx core, 0: use the little than operator to get the condition, 1: use not equal operator to get the condition"]
137 #[inline(always)]
138 #[must_use]
139 pub fn rx_cond_mode(&mut self) -> RX_COND_MODE_W<RX_CTRL_SPEC> {
140 RX_COND_MODE_W::new(self, 4)
141 }
142 #[doc = "Bit 5 - write this bit to set the bitscrambler rx core fetch instruction mode, 0: prefetch by reset, 1: fetch by instrutions"]
143 #[inline(always)]
144 #[must_use]
145 pub fn rx_fetch_mode(&mut self) -> RX_FETCH_MODE_W<RX_CTRL_SPEC> {
146 RX_FETCH_MODE_W::new(self, 5)
147 }
148 #[doc = "Bit 6 - write this bit to set the bitscrambler rx core halt mode when rx_halt is set, 0: wait write data back done, , 1: ignore write data back"]
149 #[inline(always)]
150 #[must_use]
151 pub fn rx_halt_mode(&mut self) -> RX_HALT_MODE_W<RX_CTRL_SPEC> {
152 RX_HALT_MODE_W::new(self, 6)
153 }
154 #[doc = "Bit 7 - write this bit to set the bitscrambler rx core read data mode when EOF received.0: wait read data, 1: ignore read data"]
155 #[inline(always)]
156 #[must_use]
157 pub fn rx_rd_dummy(&mut self) -> RX_RD_DUMMY_W<RX_CTRL_SPEC> {
158 RX_RD_DUMMY_W::new(self, 7)
159 }
160 #[doc = "Bit 8 - write this bit to reset the bitscrambler rx fifo"]
161 #[inline(always)]
162 #[must_use]
163 pub fn rx_fifo_rst(&mut self) -> RX_FIFO_RST_W<RX_CTRL_SPEC> {
164 RX_FIFO_RST_W::new(self, 8)
165 }
166}
167#[doc = "Control and configuration registers\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rx_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
168pub struct RX_CTRL_SPEC;
169impl crate::RegisterSpec for RX_CTRL_SPEC {
170 type Ux = u32;
171}
172#[doc = "`read()` method returns [`rx_ctrl::R`](R) reader structure"]
173impl crate::Readable for RX_CTRL_SPEC {}
174#[doc = "`write(|w| ..)` method takes [`rx_ctrl::W`](W) writer structure"]
175impl crate::Writable for RX_CTRL_SPEC {
176 type Safety = crate::Unsafe;
177 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
178 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
179}
180#[doc = "`reset()` method sets RX_CTRL to value 0x04"]
181impl crate::Resettable for RX_CTRL_SPEC {
182 const RESET_VALUE: u32 = 0x04;
183}