esp32p4/adc/
int_clr.rs

1#[doc = "Register `INT_CLR` writer"]
2pub type W = crate::W<INT_CLR_SPEC>;
3#[doc = "Field `THRES1_LOW` writer - need_des"]
4pub type THRES1_LOW_W<'a, REG> = crate::BitWriter1C<'a, REG>;
5#[doc = "Field `THRES0_LOW` writer - need_des"]
6pub type THRES0_LOW_W<'a, REG> = crate::BitWriter1C<'a, REG>;
7#[doc = "Field `THRES1_HIGH` writer - need_des"]
8pub type THRES1_HIGH_W<'a, REG> = crate::BitWriter1C<'a, REG>;
9#[doc = "Field `THRES0_HIGH` writer - need_des"]
10pub type THRES0_HIGH_W<'a, REG> = crate::BitWriter1C<'a, REG>;
11#[doc = "Field `APB_SARADC2_DONE` writer - need_des"]
12pub type APB_SARADC2_DONE_W<'a, REG> = crate::BitWriter1C<'a, REG>;
13#[doc = "Field `APB_SARADC1_DONE` writer - need_des"]
14pub type APB_SARADC1_DONE_W<'a, REG> = crate::BitWriter1C<'a, REG>;
15#[cfg(feature = "impl-register-debug")]
16impl core::fmt::Debug for crate::generic::Reg<INT_CLR_SPEC> {
17    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
18        write!(f, "(not readable)")
19    }
20}
21impl W {
22    #[doc = "Bit 26 - need_des"]
23    #[inline(always)]
24    #[must_use]
25    pub fn thres1_low(&mut self) -> THRES1_LOW_W<INT_CLR_SPEC> {
26        THRES1_LOW_W::new(self, 26)
27    }
28    #[doc = "Bit 27 - need_des"]
29    #[inline(always)]
30    #[must_use]
31    pub fn thres0_low(&mut self) -> THRES0_LOW_W<INT_CLR_SPEC> {
32        THRES0_LOW_W::new(self, 27)
33    }
34    #[doc = "Bit 28 - need_des"]
35    #[inline(always)]
36    #[must_use]
37    pub fn thres1_high(&mut self) -> THRES1_HIGH_W<INT_CLR_SPEC> {
38        THRES1_HIGH_W::new(self, 28)
39    }
40    #[doc = "Bit 29 - need_des"]
41    #[inline(always)]
42    #[must_use]
43    pub fn thres0_high(&mut self) -> THRES0_HIGH_W<INT_CLR_SPEC> {
44        THRES0_HIGH_W::new(self, 29)
45    }
46    #[doc = "Bit 30 - need_des"]
47    #[inline(always)]
48    #[must_use]
49    pub fn apb_saradc2_done(&mut self) -> APB_SARADC2_DONE_W<INT_CLR_SPEC> {
50        APB_SARADC2_DONE_W::new(self, 30)
51    }
52    #[doc = "Bit 31 - need_des"]
53    #[inline(always)]
54    #[must_use]
55    pub fn apb_saradc1_done(&mut self) -> APB_SARADC1_DONE_W<INT_CLR_SPEC> {
56        APB_SARADC1_DONE_W::new(self, 31)
57    }
58}
59#[doc = "Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`int_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
60pub struct INT_CLR_SPEC;
61impl crate::RegisterSpec for INT_CLR_SPEC {
62    type Ux = u32;
63}
64#[doc = "`write(|w| ..)` method takes [`int_clr::W`](W) writer structure"]
65impl crate::Writable for INT_CLR_SPEC {
66    type Safety = crate::Unsafe;
67    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
68    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0xfc00_0000;
69}
70#[doc = "`reset()` method sets INT_CLR to value 0"]
71impl crate::Resettable for INT_CLR_SPEC {
72    const RESET_VALUE: u32 = 0;
73}