esp32p4/
h264.rs

1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5    sys_ctrl: SYS_CTRL,
6    gop_conf: GOP_CONF,
7    a_sys_mb_res: A_SYS_MB_RES,
8    a_sys_conf: A_SYS_CONF,
9    a_deci_score: A_DECI_SCORE,
10    a_deci_score_offset: A_DECI_SCORE_OFFSET,
11    a_rc_conf0: A_RC_CONF0,
12    a_rc_conf1: A_RC_CONF1,
13    a_db_bypass: A_DB_BYPASS,
14    a_roi_region0: A_ROI_REGION0,
15    a_roi_region1: A_ROI_REGION1,
16    a_roi_region2: A_ROI_REGION2,
17    a_roi_region3: A_ROI_REGION3,
18    a_roi_region4: A_ROI_REGION4,
19    a_roi_region5: A_ROI_REGION5,
20    a_roi_region6: A_ROI_REGION6,
21    a_roi_region7: A_ROI_REGION7,
22    a_roi_region0_3_qp: A_ROI_REGION0_3_QP,
23    a_roi_region4_7_qp: A_ROI_REGION4_7_QP,
24    a_no_roi_region_qp_offset: A_NO_ROI_REGION_QP_OFFSET,
25    a_roi_config: A_ROI_CONFIG,
26    b_sys_mb_res: B_SYS_MB_RES,
27    b_sys_conf: B_SYS_CONF,
28    b_deci_score: B_DECI_SCORE,
29    b_deci_score_offset: B_DECI_SCORE_OFFSET,
30    b_rc_conf0: B_RC_CONF0,
31    b_rc_conf1: B_RC_CONF1,
32    b_db_bypass: B_DB_BYPASS,
33    b_roi_region0: B_ROI_REGION0,
34    b_roi_region1: B_ROI_REGION1,
35    b_roi_region2: B_ROI_REGION2,
36    b_roi_region3: B_ROI_REGION3,
37    b_roi_region4: B_ROI_REGION4,
38    b_roi_region5: B_ROI_REGION5,
39    b_roi_region6: B_ROI_REGION6,
40    b_roi_region7: B_ROI_REGION7,
41    b_roi_region0_3_qp: B_ROI_REGION0_3_QP,
42    b_roi_region4_7_qp: B_ROI_REGION4_7_QP,
43    b_no_roi_region_qp_offset: B_NO_ROI_REGION_QP_OFFSET,
44    b_roi_config: B_ROI_CONFIG,
45    rc_status0: RC_STATUS0,
46    rc_status1: RC_STATUS1,
47    rc_status2: RC_STATUS2,
48    slice_header_remain: SLICE_HEADER_REMAIN,
49    slice_header_byte_length: SLICE_HEADER_BYTE_LENGTH,
50    bs_threshold: BS_THRESHOLD,
51    slice_header_byte0: SLICE_HEADER_BYTE0,
52    slice_header_byte1: SLICE_HEADER_BYTE1,
53    int_raw: INT_RAW,
54    int_st: INT_ST,
55    int_ena: INT_ENA,
56    int_clr: INT_CLR,
57    conf: CONF,
58    mv_merge_config: MV_MERGE_CONFIG,
59    debug_dma_sel: DEBUG_DMA_SEL,
60    sys_status: SYS_STATUS,
61    frame_code_length: FRAME_CODE_LENGTH,
62    debug_info0: DEBUG_INFO0,
63    debug_info1: DEBUG_INFO1,
64    debug_info2: DEBUG_INFO2,
65    date: DATE,
66}
67impl RegisterBlock {
68    #[doc = "0x00 - H264 system level control register."]
69    #[inline(always)]
70    pub const fn sys_ctrl(&self) -> &SYS_CTRL {
71        &self.sys_ctrl
72    }
73    #[doc = "0x04 - GOP related configuration register."]
74    #[inline(always)]
75    pub const fn gop_conf(&self) -> &GOP_CONF {
76        &self.gop_conf
77    }
78    #[doc = "0x08 - Video A horizontal and vertical MB resolution register."]
79    #[inline(always)]
80    pub const fn a_sys_mb_res(&self) -> &A_SYS_MB_RES {
81        &self.a_sys_mb_res
82    }
83    #[doc = "0x0c - Video A system level configuration register."]
84    #[inline(always)]
85    pub const fn a_sys_conf(&self) -> &A_SYS_CONF {
86        &self.a_sys_conf
87    }
88    #[doc = "0x10 - Video A luma and chroma MB decimate score Register."]
89    #[inline(always)]
90    pub const fn a_deci_score(&self) -> &A_DECI_SCORE {
91        &self.a_deci_score
92    }
93    #[doc = "0x14 - Video A luma and chroma MB decimate score offset Register."]
94    #[inline(always)]
95    pub const fn a_deci_score_offset(&self) -> &A_DECI_SCORE_OFFSET {
96        &self.a_deci_score_offset
97    }
98    #[doc = "0x18 - Video A rate control configuration register0."]
99    #[inline(always)]
100    pub const fn a_rc_conf0(&self) -> &A_RC_CONF0 {
101        &self.a_rc_conf0
102    }
103    #[doc = "0x1c - Video A rate control configuration register1."]
104    #[inline(always)]
105    pub const fn a_rc_conf1(&self) -> &A_RC_CONF1 {
106        &self.a_rc_conf1
107    }
108    #[doc = "0x20 - Video A Deblocking bypass register"]
109    #[inline(always)]
110    pub const fn a_db_bypass(&self) -> &A_DB_BYPASS {
111        &self.a_db_bypass
112    }
113    #[doc = "0x24 - Video A H264 ROI region0 range configure register."]
114    #[inline(always)]
115    pub const fn a_roi_region0(&self) -> &A_ROI_REGION0 {
116        &self.a_roi_region0
117    }
118    #[doc = "0x28 - Video A H264 ROI region1 range configure register."]
119    #[inline(always)]
120    pub const fn a_roi_region1(&self) -> &A_ROI_REGION1 {
121        &self.a_roi_region1
122    }
123    #[doc = "0x2c - Video A H264 ROI region2 range configure register."]
124    #[inline(always)]
125    pub const fn a_roi_region2(&self) -> &A_ROI_REGION2 {
126        &self.a_roi_region2
127    }
128    #[doc = "0x30 - Video A H264 ROI region3 range configure register."]
129    #[inline(always)]
130    pub const fn a_roi_region3(&self) -> &A_ROI_REGION3 {
131        &self.a_roi_region3
132    }
133    #[doc = "0x34 - Video A H264 ROI region4 range configure register."]
134    #[inline(always)]
135    pub const fn a_roi_region4(&self) -> &A_ROI_REGION4 {
136        &self.a_roi_region4
137    }
138    #[doc = "0x38 - Video A H264 ROI region5 range configure register."]
139    #[inline(always)]
140    pub const fn a_roi_region5(&self) -> &A_ROI_REGION5 {
141        &self.a_roi_region5
142    }
143    #[doc = "0x3c - Video A H264 ROI region6 range configure register."]
144    #[inline(always)]
145    pub const fn a_roi_region6(&self) -> &A_ROI_REGION6 {
146        &self.a_roi_region6
147    }
148    #[doc = "0x40 - Video A H264 ROI region7 range configure register."]
149    #[inline(always)]
150    pub const fn a_roi_region7(&self) -> &A_ROI_REGION7 {
151        &self.a_roi_region7
152    }
153    #[doc = "0x44 - Video A H264 ROI region0, region1,region2,region3 QP register."]
154    #[inline(always)]
155    pub const fn a_roi_region0_3_qp(&self) -> &A_ROI_REGION0_3_QP {
156        &self.a_roi_region0_3_qp
157    }
158    #[doc = "0x48 - Video A H264 ROI region4, region5,region6,region7 QP register."]
159    #[inline(always)]
160    pub const fn a_roi_region4_7_qp(&self) -> &A_ROI_REGION4_7_QP {
161        &self.a_roi_region4_7_qp
162    }
163    #[doc = "0x4c - Video A H264 no roi region QP register."]
164    #[inline(always)]
165    pub const fn a_no_roi_region_qp_offset(&self) -> &A_NO_ROI_REGION_QP_OFFSET {
166        &self.a_no_roi_region_qp_offset
167    }
168    #[doc = "0x50 - Video A H264 ROI configure register."]
169    #[inline(always)]
170    pub const fn a_roi_config(&self) -> &A_ROI_CONFIG {
171        &self.a_roi_config
172    }
173    #[doc = "0x54 - Video B horizontal and vertical MB resolution register."]
174    #[inline(always)]
175    pub const fn b_sys_mb_res(&self) -> &B_SYS_MB_RES {
176        &self.b_sys_mb_res
177    }
178    #[doc = "0x58 - Video B system level configuration register."]
179    #[inline(always)]
180    pub const fn b_sys_conf(&self) -> &B_SYS_CONF {
181        &self.b_sys_conf
182    }
183    #[doc = "0x5c - Video B luma and chroma MB decimate score Register."]
184    #[inline(always)]
185    pub const fn b_deci_score(&self) -> &B_DECI_SCORE {
186        &self.b_deci_score
187    }
188    #[doc = "0x60 - Video B luma and chroma MB decimate score offset Register."]
189    #[inline(always)]
190    pub const fn b_deci_score_offset(&self) -> &B_DECI_SCORE_OFFSET {
191        &self.b_deci_score_offset
192    }
193    #[doc = "0x64 - Video B rate control configuration register0."]
194    #[inline(always)]
195    pub const fn b_rc_conf0(&self) -> &B_RC_CONF0 {
196        &self.b_rc_conf0
197    }
198    #[doc = "0x68 - Video B rate control configuration register1."]
199    #[inline(always)]
200    pub const fn b_rc_conf1(&self) -> &B_RC_CONF1 {
201        &self.b_rc_conf1
202    }
203    #[doc = "0x6c - Video B Deblocking bypass register"]
204    #[inline(always)]
205    pub const fn b_db_bypass(&self) -> &B_DB_BYPASS {
206        &self.b_db_bypass
207    }
208    #[doc = "0x70 - Video B H264 ROI region0 range configure register."]
209    #[inline(always)]
210    pub const fn b_roi_region0(&self) -> &B_ROI_REGION0 {
211        &self.b_roi_region0
212    }
213    #[doc = "0x74 - Video B H264 ROI region1 range configure register."]
214    #[inline(always)]
215    pub const fn b_roi_region1(&self) -> &B_ROI_REGION1 {
216        &self.b_roi_region1
217    }
218    #[doc = "0x78 - Video B H264 ROI region2 range configure register."]
219    #[inline(always)]
220    pub const fn b_roi_region2(&self) -> &B_ROI_REGION2 {
221        &self.b_roi_region2
222    }
223    #[doc = "0x7c - Video B H264 ROI region3 range configure register."]
224    #[inline(always)]
225    pub const fn b_roi_region3(&self) -> &B_ROI_REGION3 {
226        &self.b_roi_region3
227    }
228    #[doc = "0x80 - Video B H264 ROI region4 range configure register."]
229    #[inline(always)]
230    pub const fn b_roi_region4(&self) -> &B_ROI_REGION4 {
231        &self.b_roi_region4
232    }
233    #[doc = "0x84 - Video B H264 ROI region5 range configure register."]
234    #[inline(always)]
235    pub const fn b_roi_region5(&self) -> &B_ROI_REGION5 {
236        &self.b_roi_region5
237    }
238    #[doc = "0x88 - Video B H264 ROI region6 range configure register."]
239    #[inline(always)]
240    pub const fn b_roi_region6(&self) -> &B_ROI_REGION6 {
241        &self.b_roi_region6
242    }
243    #[doc = "0x8c - Video B H264 ROI region7 range configure register."]
244    #[inline(always)]
245    pub const fn b_roi_region7(&self) -> &B_ROI_REGION7 {
246        &self.b_roi_region7
247    }
248    #[doc = "0x90 - Video B H264 ROI region0, region1,region2,region3 QP register."]
249    #[inline(always)]
250    pub const fn b_roi_region0_3_qp(&self) -> &B_ROI_REGION0_3_QP {
251        &self.b_roi_region0_3_qp
252    }
253    #[doc = "0x94 - Video B H264 ROI region4, region5,region6,region7 QP register."]
254    #[inline(always)]
255    pub const fn b_roi_region4_7_qp(&self) -> &B_ROI_REGION4_7_QP {
256        &self.b_roi_region4_7_qp
257    }
258    #[doc = "0x98 - Video B H264 no roi region QP register."]
259    #[inline(always)]
260    pub const fn b_no_roi_region_qp_offset(&self) -> &B_NO_ROI_REGION_QP_OFFSET {
261        &self.b_no_roi_region_qp_offset
262    }
263    #[doc = "0x9c - Video B H264 ROI configure register."]
264    #[inline(always)]
265    pub const fn b_roi_config(&self) -> &B_ROI_CONFIG {
266        &self.b_roi_config
267    }
268    #[doc = "0xa0 - Rate control status register0."]
269    #[inline(always)]
270    pub const fn rc_status0(&self) -> &RC_STATUS0 {
271        &self.rc_status0
272    }
273    #[doc = "0xa4 - Rate control status register1."]
274    #[inline(always)]
275    pub const fn rc_status1(&self) -> &RC_STATUS1 {
276        &self.rc_status1
277    }
278    #[doc = "0xa8 - Rate control status register2."]
279    #[inline(always)]
280    pub const fn rc_status2(&self) -> &RC_STATUS2 {
281        &self.rc_status2
282    }
283    #[doc = "0xac - Frame Slice Header remain bit register."]
284    #[inline(always)]
285    pub const fn slice_header_remain(&self) -> &SLICE_HEADER_REMAIN {
286        &self.slice_header_remain
287    }
288    #[doc = "0xb0 - Frame Slice Header byte length register."]
289    #[inline(always)]
290    pub const fn slice_header_byte_length(&self) -> &SLICE_HEADER_BYTE_LENGTH {
291        &self.slice_header_byte_length
292    }
293    #[doc = "0xb4 - Bitstream buffer overflow threshold register"]
294    #[inline(always)]
295    pub const fn bs_threshold(&self) -> &BS_THRESHOLD {
296        &self.bs_threshold
297    }
298    #[doc = "0xb8 - Frame Slice Header byte low 32 bit register."]
299    #[inline(always)]
300    pub const fn slice_header_byte0(&self) -> &SLICE_HEADER_BYTE0 {
301        &self.slice_header_byte0
302    }
303    #[doc = "0xbc - Frame Slice Header byte high 32 bit register."]
304    #[inline(always)]
305    pub const fn slice_header_byte1(&self) -> &SLICE_HEADER_BYTE1 {
306        &self.slice_header_byte1
307    }
308    #[doc = "0xc0 - Interrupt raw status register"]
309    #[inline(always)]
310    pub const fn int_raw(&self) -> &INT_RAW {
311        &self.int_raw
312    }
313    #[doc = "0xc4 - Interrupt masked status register"]
314    #[inline(always)]
315    pub const fn int_st(&self) -> &INT_ST {
316        &self.int_st
317    }
318    #[doc = "0xc8 - Interrupt enable register"]
319    #[inline(always)]
320    pub const fn int_ena(&self) -> &INT_ENA {
321        &self.int_ena
322    }
323    #[doc = "0xcc - Interrupt clear register"]
324    #[inline(always)]
325    pub const fn int_clr(&self) -> &INT_CLR {
326        &self.int_clr
327    }
328    #[doc = "0xd0 - General configuration register."]
329    #[inline(always)]
330    pub const fn conf(&self) -> &CONF {
331        &self.conf
332    }
333    #[doc = "0xd4 - Mv merge configuration register."]
334    #[inline(always)]
335    pub const fn mv_merge_config(&self) -> &MV_MERGE_CONFIG {
336        &self.mv_merge_config
337    }
338    #[doc = "0xd8 - Debug H264 DMA select register"]
339    #[inline(always)]
340    pub const fn debug_dma_sel(&self) -> &DEBUG_DMA_SEL {
341        &self.debug_dma_sel
342    }
343    #[doc = "0xdc - System status register."]
344    #[inline(always)]
345    pub const fn sys_status(&self) -> &SYS_STATUS {
346        &self.sys_status
347    }
348    #[doc = "0xe0 - Frame code byte length register."]
349    #[inline(always)]
350    pub const fn frame_code_length(&self) -> &FRAME_CODE_LENGTH {
351        &self.frame_code_length
352    }
353    #[doc = "0xe4 - Debug information register0."]
354    #[inline(always)]
355    pub const fn debug_info0(&self) -> &DEBUG_INFO0 {
356        &self.debug_info0
357    }
358    #[doc = "0xe8 - Debug information register1."]
359    #[inline(always)]
360    pub const fn debug_info1(&self) -> &DEBUG_INFO1 {
361        &self.debug_info1
362    }
363    #[doc = "0xec - Debug information register2."]
364    #[inline(always)]
365    pub const fn debug_info2(&self) -> &DEBUG_INFO2 {
366        &self.debug_info2
367    }
368    #[doc = "0xf0 - Version control register"]
369    #[inline(always)]
370    pub const fn date(&self) -> &DATE {
371        &self.date
372    }
373}
374#[doc = "SYS_CTRL (rw) register accessor: H264 system level control register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sys_ctrl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sys_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sys_ctrl`] module"]
375pub type SYS_CTRL = crate::Reg<sys_ctrl::SYS_CTRL_SPEC>;
376#[doc = "H264 system level control register."]
377pub mod sys_ctrl;
378#[doc = "GOP_CONF (rw) register accessor: GOP related configuration register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gop_conf::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gop_conf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gop_conf`] module"]
379pub type GOP_CONF = crate::Reg<gop_conf::GOP_CONF_SPEC>;
380#[doc = "GOP related configuration register."]
381pub mod gop_conf;
382#[doc = "A_SYS_MB_RES (rw) register accessor: Video A horizontal and vertical MB resolution register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`a_sys_mb_res::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`a_sys_mb_res::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@a_sys_mb_res`] module"]
383pub type A_SYS_MB_RES = crate::Reg<a_sys_mb_res::A_SYS_MB_RES_SPEC>;
384#[doc = "Video A horizontal and vertical MB resolution register."]
385pub mod a_sys_mb_res;
386#[doc = "A_SYS_CONF (rw) register accessor: Video A system level configuration register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`a_sys_conf::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`a_sys_conf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@a_sys_conf`] module"]
387pub type A_SYS_CONF = crate::Reg<a_sys_conf::A_SYS_CONF_SPEC>;
388#[doc = "Video A system level configuration register."]
389pub mod a_sys_conf;
390#[doc = "A_DECI_SCORE (rw) register accessor: Video A luma and chroma MB decimate score Register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`a_deci_score::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`a_deci_score::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@a_deci_score`] module"]
391pub type A_DECI_SCORE = crate::Reg<a_deci_score::A_DECI_SCORE_SPEC>;
392#[doc = "Video A luma and chroma MB decimate score Register."]
393pub mod a_deci_score;
394#[doc = "A_DECI_SCORE_OFFSET (rw) register accessor: Video A luma and chroma MB decimate score offset Register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`a_deci_score_offset::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`a_deci_score_offset::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@a_deci_score_offset`] module"]
395pub type A_DECI_SCORE_OFFSET = crate::Reg<a_deci_score_offset::A_DECI_SCORE_OFFSET_SPEC>;
396#[doc = "Video A luma and chroma MB decimate score offset Register."]
397pub mod a_deci_score_offset;
398#[doc = "A_RC_CONF0 (rw) register accessor: Video A rate control configuration register0.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`a_rc_conf0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`a_rc_conf0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@a_rc_conf0`] module"]
399pub type A_RC_CONF0 = crate::Reg<a_rc_conf0::A_RC_CONF0_SPEC>;
400#[doc = "Video A rate control configuration register0."]
401pub mod a_rc_conf0;
402#[doc = "A_RC_CONF1 (rw) register accessor: Video A rate control configuration register1.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`a_rc_conf1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`a_rc_conf1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@a_rc_conf1`] module"]
403pub type A_RC_CONF1 = crate::Reg<a_rc_conf1::A_RC_CONF1_SPEC>;
404#[doc = "Video A rate control configuration register1."]
405pub mod a_rc_conf1;
406#[doc = "A_DB_BYPASS (rw) register accessor: Video A Deblocking bypass register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`a_db_bypass::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`a_db_bypass::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@a_db_bypass`] module"]
407pub type A_DB_BYPASS = crate::Reg<a_db_bypass::A_DB_BYPASS_SPEC>;
408#[doc = "Video A Deblocking bypass register"]
409pub mod a_db_bypass;
410#[doc = "A_ROI_REGION0 (rw) register accessor: Video A H264 ROI region0 range configure register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`a_roi_region0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`a_roi_region0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@a_roi_region0`] module"]
411pub type A_ROI_REGION0 = crate::Reg<a_roi_region0::A_ROI_REGION0_SPEC>;
412#[doc = "Video A H264 ROI region0 range configure register."]
413pub mod a_roi_region0;
414#[doc = "A_ROI_REGION1 (rw) register accessor: Video A H264 ROI region1 range configure register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`a_roi_region1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`a_roi_region1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@a_roi_region1`] module"]
415pub type A_ROI_REGION1 = crate::Reg<a_roi_region1::A_ROI_REGION1_SPEC>;
416#[doc = "Video A H264 ROI region1 range configure register."]
417pub mod a_roi_region1;
418#[doc = "A_ROI_REGION2 (rw) register accessor: Video A H264 ROI region2 range configure register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`a_roi_region2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`a_roi_region2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@a_roi_region2`] module"]
419pub type A_ROI_REGION2 = crate::Reg<a_roi_region2::A_ROI_REGION2_SPEC>;
420#[doc = "Video A H264 ROI region2 range configure register."]
421pub mod a_roi_region2;
422#[doc = "A_ROI_REGION3 (rw) register accessor: Video A H264 ROI region3 range configure register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`a_roi_region3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`a_roi_region3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@a_roi_region3`] module"]
423pub type A_ROI_REGION3 = crate::Reg<a_roi_region3::A_ROI_REGION3_SPEC>;
424#[doc = "Video A H264 ROI region3 range configure register."]
425pub mod a_roi_region3;
426#[doc = "A_ROI_REGION4 (rw) register accessor: Video A H264 ROI region4 range configure register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`a_roi_region4::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`a_roi_region4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@a_roi_region4`] module"]
427pub type A_ROI_REGION4 = crate::Reg<a_roi_region4::A_ROI_REGION4_SPEC>;
428#[doc = "Video A H264 ROI region4 range configure register."]
429pub mod a_roi_region4;
430#[doc = "A_ROI_REGION5 (rw) register accessor: Video A H264 ROI region5 range configure register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`a_roi_region5::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`a_roi_region5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@a_roi_region5`] module"]
431pub type A_ROI_REGION5 = crate::Reg<a_roi_region5::A_ROI_REGION5_SPEC>;
432#[doc = "Video A H264 ROI region5 range configure register."]
433pub mod a_roi_region5;
434#[doc = "A_ROI_REGION6 (rw) register accessor: Video A H264 ROI region6 range configure register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`a_roi_region6::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`a_roi_region6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@a_roi_region6`] module"]
435pub type A_ROI_REGION6 = crate::Reg<a_roi_region6::A_ROI_REGION6_SPEC>;
436#[doc = "Video A H264 ROI region6 range configure register."]
437pub mod a_roi_region6;
438#[doc = "A_ROI_REGION7 (rw) register accessor: Video A H264 ROI region7 range configure register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`a_roi_region7::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`a_roi_region7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@a_roi_region7`] module"]
439pub type A_ROI_REGION7 = crate::Reg<a_roi_region7::A_ROI_REGION7_SPEC>;
440#[doc = "Video A H264 ROI region7 range configure register."]
441pub mod a_roi_region7;
442#[doc = "A_ROI_REGION0_3_QP (rw) register accessor: Video A H264 ROI region0, region1,region2,region3 QP register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`a_roi_region0_3_qp::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`a_roi_region0_3_qp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@a_roi_region0_3_qp`] module"]
443pub type A_ROI_REGION0_3_QP = crate::Reg<a_roi_region0_3_qp::A_ROI_REGION0_3_QP_SPEC>;
444#[doc = "Video A H264 ROI region0, region1,region2,region3 QP register."]
445pub mod a_roi_region0_3_qp;
446#[doc = "A_ROI_REGION4_7_QP (rw) register accessor: Video A H264 ROI region4, region5,region6,region7 QP register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`a_roi_region4_7_qp::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`a_roi_region4_7_qp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@a_roi_region4_7_qp`] module"]
447pub type A_ROI_REGION4_7_QP = crate::Reg<a_roi_region4_7_qp::A_ROI_REGION4_7_QP_SPEC>;
448#[doc = "Video A H264 ROI region4, region5,region6,region7 QP register."]
449pub mod a_roi_region4_7_qp;
450#[doc = "A_NO_ROI_REGION_QP_OFFSET (rw) register accessor: Video A H264 no roi region QP register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`a_no_roi_region_qp_offset::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`a_no_roi_region_qp_offset::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@a_no_roi_region_qp_offset`] module"]
451pub type A_NO_ROI_REGION_QP_OFFSET =
452    crate::Reg<a_no_roi_region_qp_offset::A_NO_ROI_REGION_QP_OFFSET_SPEC>;
453#[doc = "Video A H264 no roi region QP register."]
454pub mod a_no_roi_region_qp_offset;
455#[doc = "A_ROI_CONFIG (rw) register accessor: Video A H264 ROI configure register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`a_roi_config::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`a_roi_config::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@a_roi_config`] module"]
456pub type A_ROI_CONFIG = crate::Reg<a_roi_config::A_ROI_CONFIG_SPEC>;
457#[doc = "Video A H264 ROI configure register."]
458pub mod a_roi_config;
459#[doc = "B_SYS_MB_RES (rw) register accessor: Video B horizontal and vertical MB resolution register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`b_sys_mb_res::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`b_sys_mb_res::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@b_sys_mb_res`] module"]
460pub type B_SYS_MB_RES = crate::Reg<b_sys_mb_res::B_SYS_MB_RES_SPEC>;
461#[doc = "Video B horizontal and vertical MB resolution register."]
462pub mod b_sys_mb_res;
463#[doc = "B_SYS_CONF (rw) register accessor: Video B system level configuration register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`b_sys_conf::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`b_sys_conf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@b_sys_conf`] module"]
464pub type B_SYS_CONF = crate::Reg<b_sys_conf::B_SYS_CONF_SPEC>;
465#[doc = "Video B system level configuration register."]
466pub mod b_sys_conf;
467#[doc = "B_DECI_SCORE (rw) register accessor: Video B luma and chroma MB decimate score Register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`b_deci_score::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`b_deci_score::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@b_deci_score`] module"]
468pub type B_DECI_SCORE = crate::Reg<b_deci_score::B_DECI_SCORE_SPEC>;
469#[doc = "Video B luma and chroma MB decimate score Register."]
470pub mod b_deci_score;
471#[doc = "B_DECI_SCORE_OFFSET (rw) register accessor: Video B luma and chroma MB decimate score offset Register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`b_deci_score_offset::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`b_deci_score_offset::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@b_deci_score_offset`] module"]
472pub type B_DECI_SCORE_OFFSET = crate::Reg<b_deci_score_offset::B_DECI_SCORE_OFFSET_SPEC>;
473#[doc = "Video B luma and chroma MB decimate score offset Register."]
474pub mod b_deci_score_offset;
475#[doc = "B_RC_CONF0 (rw) register accessor: Video B rate control configuration register0.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`b_rc_conf0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`b_rc_conf0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@b_rc_conf0`] module"]
476pub type B_RC_CONF0 = crate::Reg<b_rc_conf0::B_RC_CONF0_SPEC>;
477#[doc = "Video B rate control configuration register0."]
478pub mod b_rc_conf0;
479#[doc = "B_RC_CONF1 (rw) register accessor: Video B rate control configuration register1.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`b_rc_conf1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`b_rc_conf1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@b_rc_conf1`] module"]
480pub type B_RC_CONF1 = crate::Reg<b_rc_conf1::B_RC_CONF1_SPEC>;
481#[doc = "Video B rate control configuration register1."]
482pub mod b_rc_conf1;
483#[doc = "B_DB_BYPASS (rw) register accessor: Video B Deblocking bypass register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`b_db_bypass::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`b_db_bypass::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@b_db_bypass`] module"]
484pub type B_DB_BYPASS = crate::Reg<b_db_bypass::B_DB_BYPASS_SPEC>;
485#[doc = "Video B Deblocking bypass register"]
486pub mod b_db_bypass;
487#[doc = "B_ROI_REGION0 (rw) register accessor: Video B H264 ROI region0 range configure register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`b_roi_region0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`b_roi_region0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@b_roi_region0`] module"]
488pub type B_ROI_REGION0 = crate::Reg<b_roi_region0::B_ROI_REGION0_SPEC>;
489#[doc = "Video B H264 ROI region0 range configure register."]
490pub mod b_roi_region0;
491#[doc = "B_ROI_REGION1 (rw) register accessor: Video B H264 ROI region1 range configure register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`b_roi_region1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`b_roi_region1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@b_roi_region1`] module"]
492pub type B_ROI_REGION1 = crate::Reg<b_roi_region1::B_ROI_REGION1_SPEC>;
493#[doc = "Video B H264 ROI region1 range configure register."]
494pub mod b_roi_region1;
495#[doc = "B_ROI_REGION2 (rw) register accessor: Video B H264 ROI region2 range configure register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`b_roi_region2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`b_roi_region2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@b_roi_region2`] module"]
496pub type B_ROI_REGION2 = crate::Reg<b_roi_region2::B_ROI_REGION2_SPEC>;
497#[doc = "Video B H264 ROI region2 range configure register."]
498pub mod b_roi_region2;
499#[doc = "B_ROI_REGION3 (rw) register accessor: Video B H264 ROI region3 range configure register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`b_roi_region3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`b_roi_region3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@b_roi_region3`] module"]
500pub type B_ROI_REGION3 = crate::Reg<b_roi_region3::B_ROI_REGION3_SPEC>;
501#[doc = "Video B H264 ROI region3 range configure register."]
502pub mod b_roi_region3;
503#[doc = "B_ROI_REGION4 (rw) register accessor: Video B H264 ROI region4 range configure register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`b_roi_region4::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`b_roi_region4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@b_roi_region4`] module"]
504pub type B_ROI_REGION4 = crate::Reg<b_roi_region4::B_ROI_REGION4_SPEC>;
505#[doc = "Video B H264 ROI region4 range configure register."]
506pub mod b_roi_region4;
507#[doc = "B_ROI_REGION5 (rw) register accessor: Video B H264 ROI region5 range configure register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`b_roi_region5::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`b_roi_region5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@b_roi_region5`] module"]
508pub type B_ROI_REGION5 = crate::Reg<b_roi_region5::B_ROI_REGION5_SPEC>;
509#[doc = "Video B H264 ROI region5 range configure register."]
510pub mod b_roi_region5;
511#[doc = "B_ROI_REGION6 (rw) register accessor: Video B H264 ROI region6 range configure register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`b_roi_region6::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`b_roi_region6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@b_roi_region6`] module"]
512pub type B_ROI_REGION6 = crate::Reg<b_roi_region6::B_ROI_REGION6_SPEC>;
513#[doc = "Video B H264 ROI region6 range configure register."]
514pub mod b_roi_region6;
515#[doc = "B_ROI_REGION7 (rw) register accessor: Video B H264 ROI region7 range configure register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`b_roi_region7::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`b_roi_region7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@b_roi_region7`] module"]
516pub type B_ROI_REGION7 = crate::Reg<b_roi_region7::B_ROI_REGION7_SPEC>;
517#[doc = "Video B H264 ROI region7 range configure register."]
518pub mod b_roi_region7;
519#[doc = "B_ROI_REGION0_3_QP (rw) register accessor: Video B H264 ROI region0, region1,region2,region3 QP register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`b_roi_region0_3_qp::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`b_roi_region0_3_qp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@b_roi_region0_3_qp`] module"]
520pub type B_ROI_REGION0_3_QP = crate::Reg<b_roi_region0_3_qp::B_ROI_REGION0_3_QP_SPEC>;
521#[doc = "Video B H264 ROI region0, region1,region2,region3 QP register."]
522pub mod b_roi_region0_3_qp;
523#[doc = "B_ROI_REGION4_7_QP (rw) register accessor: Video B H264 ROI region4, region5,region6,region7 QP register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`b_roi_region4_7_qp::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`b_roi_region4_7_qp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@b_roi_region4_7_qp`] module"]
524pub type B_ROI_REGION4_7_QP = crate::Reg<b_roi_region4_7_qp::B_ROI_REGION4_7_QP_SPEC>;
525#[doc = "Video B H264 ROI region4, region5,region6,region7 QP register."]
526pub mod b_roi_region4_7_qp;
527#[doc = "B_NO_ROI_REGION_QP_OFFSET (rw) register accessor: Video B H264 no roi region QP register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`b_no_roi_region_qp_offset::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`b_no_roi_region_qp_offset::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@b_no_roi_region_qp_offset`] module"]
528pub type B_NO_ROI_REGION_QP_OFFSET =
529    crate::Reg<b_no_roi_region_qp_offset::B_NO_ROI_REGION_QP_OFFSET_SPEC>;
530#[doc = "Video B H264 no roi region QP register."]
531pub mod b_no_roi_region_qp_offset;
532#[doc = "B_ROI_CONFIG (rw) register accessor: Video B H264 ROI configure register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`b_roi_config::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`b_roi_config::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@b_roi_config`] module"]
533pub type B_ROI_CONFIG = crate::Reg<b_roi_config::B_ROI_CONFIG_SPEC>;
534#[doc = "Video B H264 ROI configure register."]
535pub mod b_roi_config;
536#[doc = "RC_STATUS0 (r) register accessor: Rate control status register0.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rc_status0::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rc_status0`] module"]
537pub type RC_STATUS0 = crate::Reg<rc_status0::RC_STATUS0_SPEC>;
538#[doc = "Rate control status register0."]
539pub mod rc_status0;
540#[doc = "RC_STATUS1 (r) register accessor: Rate control status register1.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rc_status1::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rc_status1`] module"]
541pub type RC_STATUS1 = crate::Reg<rc_status1::RC_STATUS1_SPEC>;
542#[doc = "Rate control status register1."]
543pub mod rc_status1;
544#[doc = "RC_STATUS2 (r) register accessor: Rate control status register2.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rc_status2::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rc_status2`] module"]
545pub type RC_STATUS2 = crate::Reg<rc_status2::RC_STATUS2_SPEC>;
546#[doc = "Rate control status register2."]
547pub mod rc_status2;
548#[doc = "SLICE_HEADER_REMAIN (rw) register accessor: Frame Slice Header remain bit register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`slice_header_remain::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`slice_header_remain::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@slice_header_remain`] module"]
549pub type SLICE_HEADER_REMAIN = crate::Reg<slice_header_remain::SLICE_HEADER_REMAIN_SPEC>;
550#[doc = "Frame Slice Header remain bit register."]
551pub mod slice_header_remain;
552#[doc = "SLICE_HEADER_BYTE_LENGTH (rw) register accessor: Frame Slice Header byte length register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`slice_header_byte_length::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`slice_header_byte_length::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@slice_header_byte_length`] module"]
553pub type SLICE_HEADER_BYTE_LENGTH =
554    crate::Reg<slice_header_byte_length::SLICE_HEADER_BYTE_LENGTH_SPEC>;
555#[doc = "Frame Slice Header byte length register."]
556pub mod slice_header_byte_length;
557#[doc = "BS_THRESHOLD (rw) register accessor: Bitstream buffer overflow threshold register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bs_threshold::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bs_threshold::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bs_threshold`] module"]
558pub type BS_THRESHOLD = crate::Reg<bs_threshold::BS_THRESHOLD_SPEC>;
559#[doc = "Bitstream buffer overflow threshold register"]
560pub mod bs_threshold;
561#[doc = "SLICE_HEADER_BYTE0 (rw) register accessor: Frame Slice Header byte low 32 bit register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`slice_header_byte0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`slice_header_byte0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@slice_header_byte0`] module"]
562pub type SLICE_HEADER_BYTE0 = crate::Reg<slice_header_byte0::SLICE_HEADER_BYTE0_SPEC>;
563#[doc = "Frame Slice Header byte low 32 bit register."]
564pub mod slice_header_byte0;
565#[doc = "SLICE_HEADER_BYTE1 (rw) register accessor: Frame Slice Header byte high 32 bit register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`slice_header_byte1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`slice_header_byte1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@slice_header_byte1`] module"]
566pub type SLICE_HEADER_BYTE1 = crate::Reg<slice_header_byte1::SLICE_HEADER_BYTE1_SPEC>;
567#[doc = "Frame Slice Header byte high 32 bit register."]
568pub mod slice_header_byte1;
569#[doc = "INT_RAW (rw) register accessor: Interrupt raw status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`int_raw::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`int_raw::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_raw`] module"]
570pub type INT_RAW = crate::Reg<int_raw::INT_RAW_SPEC>;
571#[doc = "Interrupt raw status register"]
572pub mod int_raw;
573#[doc = "INT_ST (r) register accessor: Interrupt masked status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`int_st::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_st`] module"]
574pub type INT_ST = crate::Reg<int_st::INT_ST_SPEC>;
575#[doc = "Interrupt masked status register"]
576pub mod int_st;
577#[doc = "INT_ENA (rw) register accessor: Interrupt enable register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`int_ena::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`int_ena::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_ena`] module"]
578pub type INT_ENA = crate::Reg<int_ena::INT_ENA_SPEC>;
579#[doc = "Interrupt enable register"]
580pub mod int_ena;
581#[doc = "INT_CLR (w) register accessor: Interrupt clear register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`int_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_clr`] module"]
582pub type INT_CLR = crate::Reg<int_clr::INT_CLR_SPEC>;
583#[doc = "Interrupt clear register"]
584pub mod int_clr;
585#[doc = "CONF (rw) register accessor: General configuration register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`conf::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`conf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@conf`] module"]
586pub type CONF = crate::Reg<conf::CONF_SPEC>;
587#[doc = "General configuration register."]
588pub mod conf;
589#[doc = "MV_MERGE_CONFIG (rw) register accessor: Mv merge configuration register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mv_merge_config::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mv_merge_config::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mv_merge_config`] module"]
590pub type MV_MERGE_CONFIG = crate::Reg<mv_merge_config::MV_MERGE_CONFIG_SPEC>;
591#[doc = "Mv merge configuration register."]
592pub mod mv_merge_config;
593#[doc = "DEBUG_DMA_SEL (rw) register accessor: Debug H264 DMA select register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`debug_dma_sel::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`debug_dma_sel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@debug_dma_sel`] module"]
594pub type DEBUG_DMA_SEL = crate::Reg<debug_dma_sel::DEBUG_DMA_SEL_SPEC>;
595#[doc = "Debug H264 DMA select register"]
596pub mod debug_dma_sel;
597#[doc = "SYS_STATUS (r) register accessor: System status register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sys_status::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sys_status`] module"]
598pub type SYS_STATUS = crate::Reg<sys_status::SYS_STATUS_SPEC>;
599#[doc = "System status register."]
600pub mod sys_status;
601#[doc = "FRAME_CODE_LENGTH (r) register accessor: Frame code byte length register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`frame_code_length::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@frame_code_length`] module"]
602pub type FRAME_CODE_LENGTH = crate::Reg<frame_code_length::FRAME_CODE_LENGTH_SPEC>;
603#[doc = "Frame code byte length register."]
604pub mod frame_code_length;
605#[doc = "DEBUG_INFO0 (r) register accessor: Debug information register0.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`debug_info0::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@debug_info0`] module"]
606pub type DEBUG_INFO0 = crate::Reg<debug_info0::DEBUG_INFO0_SPEC>;
607#[doc = "Debug information register0."]
608pub mod debug_info0;
609#[doc = "DEBUG_INFO1 (r) register accessor: Debug information register1.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`debug_info1::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@debug_info1`] module"]
610pub type DEBUG_INFO1 = crate::Reg<debug_info1::DEBUG_INFO1_SPEC>;
611#[doc = "Debug information register1."]
612pub mod debug_info1;
613#[doc = "DEBUG_INFO2 (r) register accessor: Debug information register2.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`debug_info2::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@debug_info2`] module"]
614pub type DEBUG_INFO2 = crate::Reg<debug_info2::DEBUG_INFO2_SPEC>;
615#[doc = "Debug information register2."]
616pub mod debug_info2;
617#[doc = "DATE (rw) register accessor: Version control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`date::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
618pub type DATE = crate::Reg<date::DATE_SPEC>;
619#[doc = "Version control register"]
620pub mod date;
esp32p4/h264.rs

esp32p4/
h264.rs
