Module dma

Expand description

DMA (Direct Memory Access) Controller

Re-exports§

cfg0: NA
ch: Cluster Cluster CH%s, containing CH?_SAR0, CH?_SAR1, CH?_DAR0, CH?_DAR1, CH?_BLOCK_TS0, CH?_CTL0, CH?_CTL1, CH?_CFG0, CH?_CFG1, CH?_LLP0, CH?_LLP1, CH?_STATUS0, CH?_STATUS1, CH?_SWHSSRC0, CH?_SWHSDST0, CH?_BLK_TFR_RESUMEREQ0, CH?_AXI_ID0, CH?_AXI_QOS0, CH?_SSTAT0, CH?_DSTAT0, CH?_SSTATAR0, CH?_SSTATAR1, CH?_DSTATAR0, CH?_DSTATAR1, CH?_INTSTATUS_ENABLE0, CH?_INTSTATUS_ENABLE1, CH?_INTSTATUS0, CH?_INTSTATUS1, CH?_INTSIGNAL_ENABLE0, CH?_INTSIGNAL_ENABLE1, CH?_INTCLEAR0, CH?_INTCLEAR1
chen0: NA
chen1: NA
commonreg_intclear0: NA
commonreg_intsignal_enable0: NA
commonreg_intstatus0: NA
commonreg_intstatus_enable0: NA
compver0: NA
id0: NA
intstatus0: NA
lowpower_cfg0: NA
lowpower_cfg1: NA
reset0: NA

CFG0: CFG0 (rw) register accessor: NA
CHEN0: CHEN0 (rw) register accessor: NA
CHEN1: CHEN1 (rw) register accessor: NA
COMMONREG_INTCLEAR0: COMMONREG_INTCLEAR0 (w) register accessor: NA
COMMONREG_INTSIGNAL_ENABLE0: COMMONREG_INTSIGNAL_ENABLE0 (rw) register accessor: NA
COMMONREG_INTSTATUS0: COMMONREG_INTSTATUS0 (r) register accessor: NA
COMMONREG_INTSTATUS_ENABLE0: COMMONREG_INTSTATUS_ENABLE0 (rw) register accessor: NA
COMPVER0: COMPVER0 (r) register accessor: NA
ID0: ID0 (r) register accessor: NA
INTSTATUS0: INTSTATUS0 (r) register accessor: NA
LOWPOWER_CFG0: LOWPOWER_CFG0 (rw) register accessor: NA
LOWPOWER_CFG1: LOWPOWER_CFG1 (rw) register accessor: NA
RESET0: RESET0 (rw) register accessor: NA