esp32p4/usb_device/
conf0.rs

1#[doc = "Register `CONF0` reader"]
2pub type R = crate::R<CONF0_SPEC>;
3#[doc = "Register `CONF0` writer"]
4pub type W = crate::W<CONF0_SPEC>;
5#[doc = "Field `PHY_SEL` reader - Select internal/external PHY"]
6pub type PHY_SEL_R = crate::BitReader;
7#[doc = "Field `PHY_SEL` writer - Select internal/external PHY"]
8pub type PHY_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `EXCHG_PINS_OVERRIDE` reader - Enable software control USB D+ D- exchange"]
10pub type EXCHG_PINS_OVERRIDE_R = crate::BitReader;
11#[doc = "Field `EXCHG_PINS_OVERRIDE` writer - Enable software control USB D+ D- exchange"]
12pub type EXCHG_PINS_OVERRIDE_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `EXCHG_PINS` reader - USB D+ D- exchange"]
14pub type EXCHG_PINS_R = crate::BitReader;
15#[doc = "Field `EXCHG_PINS` writer - USB D+ D- exchange"]
16pub type EXCHG_PINS_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `VREFH` reader - Control single-end input high threshold,1.76V to 2V, step 80mV"]
18pub type VREFH_R = crate::FieldReader;
19#[doc = "Field `VREFH` writer - Control single-end input high threshold,1.76V to 2V, step 80mV"]
20pub type VREFH_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
21#[doc = "Field `VREFL` reader - Control single-end input low threshold,0.8V to 1.04V, step 80mV"]
22pub type VREFL_R = crate::FieldReader;
23#[doc = "Field `VREFL` writer - Control single-end input low threshold,0.8V to 1.04V, step 80mV"]
24pub type VREFL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
25#[doc = "Field `VREF_OVERRIDE` reader - Enable software control input threshold"]
26pub type VREF_OVERRIDE_R = crate::BitReader;
27#[doc = "Field `VREF_OVERRIDE` writer - Enable software control input threshold"]
28pub type VREF_OVERRIDE_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `PAD_PULL_OVERRIDE` reader - Enable software control USB D+ D- pullup pulldown"]
30pub type PAD_PULL_OVERRIDE_R = crate::BitReader;
31#[doc = "Field `PAD_PULL_OVERRIDE` writer - Enable software control USB D+ D- pullup pulldown"]
32pub type PAD_PULL_OVERRIDE_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `DP_PULLUP` reader - Control USB D+ pull up."]
34pub type DP_PULLUP_R = crate::BitReader;
35#[doc = "Field `DP_PULLUP` writer - Control USB D+ pull up."]
36pub type DP_PULLUP_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `DP_PULLDOWN` reader - Control USB D+ pull down."]
38pub type DP_PULLDOWN_R = crate::BitReader;
39#[doc = "Field `DP_PULLDOWN` writer - Control USB D+ pull down."]
40pub type DP_PULLDOWN_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `DM_PULLUP` reader - Control USB D- pull up."]
42pub type DM_PULLUP_R = crate::BitReader;
43#[doc = "Field `DM_PULLUP` writer - Control USB D- pull up."]
44pub type DM_PULLUP_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `DM_PULLDOWN` reader - Control USB D- pull down."]
46pub type DM_PULLDOWN_R = crate::BitReader;
47#[doc = "Field `DM_PULLDOWN` writer - Control USB D- pull down."]
48pub type DM_PULLDOWN_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `PULLUP_VALUE` reader - Control pull up value."]
50pub type PULLUP_VALUE_R = crate::BitReader;
51#[doc = "Field `PULLUP_VALUE` writer - Control pull up value."]
52pub type PULLUP_VALUE_W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `USB_PAD_ENABLE` reader - Enable USB pad function."]
54pub type USB_PAD_ENABLE_R = crate::BitReader;
55#[doc = "Field `USB_PAD_ENABLE` writer - Enable USB pad function."]
56pub type USB_PAD_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `USB_JTAG_BRIDGE_EN` reader - Set this bit usb_jtag, the connection between usb_jtag and internal JTAG is disconnected, and MTMS, MTDI, MTCK are output through GPIO Matrix, MTDO is input through GPIO Matrix."]
58pub type USB_JTAG_BRIDGE_EN_R = crate::BitReader;
59#[doc = "Field `USB_JTAG_BRIDGE_EN` writer - Set this bit usb_jtag, the connection between usb_jtag and internal JTAG is disconnected, and MTMS, MTDI, MTCK are output through GPIO Matrix, MTDO is input through GPIO Matrix."]
60pub type USB_JTAG_BRIDGE_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
61impl R {
62    #[doc = "Bit 0 - Select internal/external PHY"]
63    #[inline(always)]
64    pub fn phy_sel(&self) -> PHY_SEL_R {
65        PHY_SEL_R::new((self.bits & 1) != 0)
66    }
67    #[doc = "Bit 1 - Enable software control USB D+ D- exchange"]
68    #[inline(always)]
69    pub fn exchg_pins_override(&self) -> EXCHG_PINS_OVERRIDE_R {
70        EXCHG_PINS_OVERRIDE_R::new(((self.bits >> 1) & 1) != 0)
71    }
72    #[doc = "Bit 2 - USB D+ D- exchange"]
73    #[inline(always)]
74    pub fn exchg_pins(&self) -> EXCHG_PINS_R {
75        EXCHG_PINS_R::new(((self.bits >> 2) & 1) != 0)
76    }
77    #[doc = "Bits 3:4 - Control single-end input high threshold,1.76V to 2V, step 80mV"]
78    #[inline(always)]
79    pub fn vrefh(&self) -> VREFH_R {
80        VREFH_R::new(((self.bits >> 3) & 3) as u8)
81    }
82    #[doc = "Bits 5:6 - Control single-end input low threshold,0.8V to 1.04V, step 80mV"]
83    #[inline(always)]
84    pub fn vrefl(&self) -> VREFL_R {
85        VREFL_R::new(((self.bits >> 5) & 3) as u8)
86    }
87    #[doc = "Bit 7 - Enable software control input threshold"]
88    #[inline(always)]
89    pub fn vref_override(&self) -> VREF_OVERRIDE_R {
90        VREF_OVERRIDE_R::new(((self.bits >> 7) & 1) != 0)
91    }
92    #[doc = "Bit 8 - Enable software control USB D+ D- pullup pulldown"]
93    #[inline(always)]
94    pub fn pad_pull_override(&self) -> PAD_PULL_OVERRIDE_R {
95        PAD_PULL_OVERRIDE_R::new(((self.bits >> 8) & 1) != 0)
96    }
97    #[doc = "Bit 9 - Control USB D+ pull up."]
98    #[inline(always)]
99    pub fn dp_pullup(&self) -> DP_PULLUP_R {
100        DP_PULLUP_R::new(((self.bits >> 9) & 1) != 0)
101    }
102    #[doc = "Bit 10 - Control USB D+ pull down."]
103    #[inline(always)]
104    pub fn dp_pulldown(&self) -> DP_PULLDOWN_R {
105        DP_PULLDOWN_R::new(((self.bits >> 10) & 1) != 0)
106    }
107    #[doc = "Bit 11 - Control USB D- pull up."]
108    #[inline(always)]
109    pub fn dm_pullup(&self) -> DM_PULLUP_R {
110        DM_PULLUP_R::new(((self.bits >> 11) & 1) != 0)
111    }
112    #[doc = "Bit 12 - Control USB D- pull down."]
113    #[inline(always)]
114    pub fn dm_pulldown(&self) -> DM_PULLDOWN_R {
115        DM_PULLDOWN_R::new(((self.bits >> 12) & 1) != 0)
116    }
117    #[doc = "Bit 13 - Control pull up value."]
118    #[inline(always)]
119    pub fn pullup_value(&self) -> PULLUP_VALUE_R {
120        PULLUP_VALUE_R::new(((self.bits >> 13) & 1) != 0)
121    }
122    #[doc = "Bit 14 - Enable USB pad function."]
123    #[inline(always)]
124    pub fn usb_pad_enable(&self) -> USB_PAD_ENABLE_R {
125        USB_PAD_ENABLE_R::new(((self.bits >> 14) & 1) != 0)
126    }
127    #[doc = "Bit 15 - Set this bit usb_jtag, the connection between usb_jtag and internal JTAG is disconnected, and MTMS, MTDI, MTCK are output through GPIO Matrix, MTDO is input through GPIO Matrix."]
128    #[inline(always)]
129    pub fn usb_jtag_bridge_en(&self) -> USB_JTAG_BRIDGE_EN_R {
130        USB_JTAG_BRIDGE_EN_R::new(((self.bits >> 15) & 1) != 0)
131    }
132}
133#[cfg(feature = "impl-register-debug")]
134impl core::fmt::Debug for R {
135    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
136        f.debug_struct("CONF0")
137            .field("phy_sel", &format_args!("{}", self.phy_sel().bit()))
138            .field(
139                "exchg_pins_override",
140                &format_args!("{}", self.exchg_pins_override().bit()),
141            )
142            .field("exchg_pins", &format_args!("{}", self.exchg_pins().bit()))
143            .field("vrefh", &format_args!("{}", self.vrefh().bits()))
144            .field("vrefl", &format_args!("{}", self.vrefl().bits()))
145            .field(
146                "vref_override",
147                &format_args!("{}", self.vref_override().bit()),
148            )
149            .field(
150                "pad_pull_override",
151                &format_args!("{}", self.pad_pull_override().bit()),
152            )
153            .field("dp_pullup", &format_args!("{}", self.dp_pullup().bit()))
154            .field("dp_pulldown", &format_args!("{}", self.dp_pulldown().bit()))
155            .field("dm_pullup", &format_args!("{}", self.dm_pullup().bit()))
156            .field("dm_pulldown", &format_args!("{}", self.dm_pulldown().bit()))
157            .field(
158                "pullup_value",
159                &format_args!("{}", self.pullup_value().bit()),
160            )
161            .field(
162                "usb_pad_enable",
163                &format_args!("{}", self.usb_pad_enable().bit()),
164            )
165            .field(
166                "usb_jtag_bridge_en",
167                &format_args!("{}", self.usb_jtag_bridge_en().bit()),
168            )
169            .finish()
170    }
171}
172#[cfg(feature = "impl-register-debug")]
173impl core::fmt::Debug for crate::generic::Reg<CONF0_SPEC> {
174    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
175        core::fmt::Debug::fmt(&self.read(), f)
176    }
177}
178impl W {
179    #[doc = "Bit 0 - Select internal/external PHY"]
180    #[inline(always)]
181    #[must_use]
182    pub fn phy_sel(&mut self) -> PHY_SEL_W<CONF0_SPEC> {
183        PHY_SEL_W::new(self, 0)
184    }
185    #[doc = "Bit 1 - Enable software control USB D+ D- exchange"]
186    #[inline(always)]
187    #[must_use]
188    pub fn exchg_pins_override(&mut self) -> EXCHG_PINS_OVERRIDE_W<CONF0_SPEC> {
189        EXCHG_PINS_OVERRIDE_W::new(self, 1)
190    }
191    #[doc = "Bit 2 - USB D+ D- exchange"]
192    #[inline(always)]
193    #[must_use]
194    pub fn exchg_pins(&mut self) -> EXCHG_PINS_W<CONF0_SPEC> {
195        EXCHG_PINS_W::new(self, 2)
196    }
197    #[doc = "Bits 3:4 - Control single-end input high threshold,1.76V to 2V, step 80mV"]
198    #[inline(always)]
199    #[must_use]
200    pub fn vrefh(&mut self) -> VREFH_W<CONF0_SPEC> {
201        VREFH_W::new(self, 3)
202    }
203    #[doc = "Bits 5:6 - Control single-end input low threshold,0.8V to 1.04V, step 80mV"]
204    #[inline(always)]
205    #[must_use]
206    pub fn vrefl(&mut self) -> VREFL_W<CONF0_SPEC> {
207        VREFL_W::new(self, 5)
208    }
209    #[doc = "Bit 7 - Enable software control input threshold"]
210    #[inline(always)]
211    #[must_use]
212    pub fn vref_override(&mut self) -> VREF_OVERRIDE_W<CONF0_SPEC> {
213        VREF_OVERRIDE_W::new(self, 7)
214    }
215    #[doc = "Bit 8 - Enable software control USB D+ D- pullup pulldown"]
216    #[inline(always)]
217    #[must_use]
218    pub fn pad_pull_override(&mut self) -> PAD_PULL_OVERRIDE_W<CONF0_SPEC> {
219        PAD_PULL_OVERRIDE_W::new(self, 8)
220    }
221    #[doc = "Bit 9 - Control USB D+ pull up."]
222    #[inline(always)]
223    #[must_use]
224    pub fn dp_pullup(&mut self) -> DP_PULLUP_W<CONF0_SPEC> {
225        DP_PULLUP_W::new(self, 9)
226    }
227    #[doc = "Bit 10 - Control USB D+ pull down."]
228    #[inline(always)]
229    #[must_use]
230    pub fn dp_pulldown(&mut self) -> DP_PULLDOWN_W<CONF0_SPEC> {
231        DP_PULLDOWN_W::new(self, 10)
232    }
233    #[doc = "Bit 11 - Control USB D- pull up."]
234    #[inline(always)]
235    #[must_use]
236    pub fn dm_pullup(&mut self) -> DM_PULLUP_W<CONF0_SPEC> {
237        DM_PULLUP_W::new(self, 11)
238    }
239    #[doc = "Bit 12 - Control USB D- pull down."]
240    #[inline(always)]
241    #[must_use]
242    pub fn dm_pulldown(&mut self) -> DM_PULLDOWN_W<CONF0_SPEC> {
243        DM_PULLDOWN_W::new(self, 12)
244    }
245    #[doc = "Bit 13 - Control pull up value."]
246    #[inline(always)]
247    #[must_use]
248    pub fn pullup_value(&mut self) -> PULLUP_VALUE_W<CONF0_SPEC> {
249        PULLUP_VALUE_W::new(self, 13)
250    }
251    #[doc = "Bit 14 - Enable USB pad function."]
252    #[inline(always)]
253    #[must_use]
254    pub fn usb_pad_enable(&mut self) -> USB_PAD_ENABLE_W<CONF0_SPEC> {
255        USB_PAD_ENABLE_W::new(self, 14)
256    }
257    #[doc = "Bit 15 - Set this bit usb_jtag, the connection between usb_jtag and internal JTAG is disconnected, and MTMS, MTDI, MTCK are output through GPIO Matrix, MTDO is input through GPIO Matrix."]
258    #[inline(always)]
259    #[must_use]
260    pub fn usb_jtag_bridge_en(&mut self) -> USB_JTAG_BRIDGE_EN_W<CONF0_SPEC> {
261        USB_JTAG_BRIDGE_EN_W::new(self, 15)
262    }
263}
264#[doc = "PHY hardware configuration.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`conf0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`conf0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
265pub struct CONF0_SPEC;
266impl crate::RegisterSpec for CONF0_SPEC {
267    type Ux = u32;
268}
269#[doc = "`read()` method returns [`conf0::R`](R) reader structure"]
270impl crate::Readable for CONF0_SPEC {}
271#[doc = "`write(|w| ..)` method takes [`conf0::W`](W) writer structure"]
272impl crate::Writable for CONF0_SPEC {
273    type Safety = crate::Unsafe;
274    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
275    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
276}
277#[doc = "`reset()` method sets CONF0 to value 0x4200"]
278impl crate::Resettable for CONF0_SPEC {
279    const RESET_VALUE: u32 = 0x4200;
280}