esp32p4/spi0/
spi_smem_ecc_ctrl.rs

1#[doc = "Register `SPI_SMEM_ECC_CTRL` reader"]
2pub type R = crate::R<SPI_SMEM_ECC_CTRL_SPEC>;
3#[doc = "Register `SPI_SMEM_ECC_CTRL` writer"]
4pub type W = crate::W<SPI_SMEM_ECC_CTRL_SPEC>;
5#[doc = "Field `SPI_SMEM_ECC_ERR_INT_EN` reader - Set this bit to calculate the error times of MSPI ECC read when accesses to external RAM."]
6pub type SPI_SMEM_ECC_ERR_INT_EN_R = crate::BitReader;
7#[doc = "Field `SPI_SMEM_ECC_ERR_INT_EN` writer - Set this bit to calculate the error times of MSPI ECC read when accesses to external RAM."]
8pub type SPI_SMEM_ECC_ERR_INT_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `SPI_SMEM_PAGE_SIZE` reader - Set the page size of the external RAM accessed by MSPI. 0: 256 bytes. 1: 512 bytes. 2: 1024 bytes. 3: 2048 bytes."]
10pub type SPI_SMEM_PAGE_SIZE_R = crate::FieldReader;
11#[doc = "Field `SPI_SMEM_PAGE_SIZE` writer - Set the page size of the external RAM accessed by MSPI. 0: 256 bytes. 1: 512 bytes. 2: 1024 bytes. 3: 2048 bytes."]
12pub type SPI_SMEM_PAGE_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
13#[doc = "Field `SPI_SMEM_ECC_ADDR_EN` reader - Set this bit to enable MSPI ECC address conversion, no matter MSPI accesses to the ECC region or non-ECC region of external RAM. If there is no ECC region in external RAM, this bit should be 0. Otherwise, this bit should be 1."]
14pub type SPI_SMEM_ECC_ADDR_EN_R = crate::BitReader;
15#[doc = "Field `SPI_SMEM_ECC_ADDR_EN` writer - Set this bit to enable MSPI ECC address conversion, no matter MSPI accesses to the ECC region or non-ECC region of external RAM. If there is no ECC region in external RAM, this bit should be 0. Otherwise, this bit should be 1."]
16pub type SPI_SMEM_ECC_ADDR_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
17impl R {
18    #[doc = "Bit 17 - Set this bit to calculate the error times of MSPI ECC read when accesses to external RAM."]
19    #[inline(always)]
20    pub fn spi_smem_ecc_err_int_en(&self) -> SPI_SMEM_ECC_ERR_INT_EN_R {
21        SPI_SMEM_ECC_ERR_INT_EN_R::new(((self.bits >> 17) & 1) != 0)
22    }
23    #[doc = "Bits 18:19 - Set the page size of the external RAM accessed by MSPI. 0: 256 bytes. 1: 512 bytes. 2: 1024 bytes. 3: 2048 bytes."]
24    #[inline(always)]
25    pub fn spi_smem_page_size(&self) -> SPI_SMEM_PAGE_SIZE_R {
26        SPI_SMEM_PAGE_SIZE_R::new(((self.bits >> 18) & 3) as u8)
27    }
28    #[doc = "Bit 20 - Set this bit to enable MSPI ECC address conversion, no matter MSPI accesses to the ECC region or non-ECC region of external RAM. If there is no ECC region in external RAM, this bit should be 0. Otherwise, this bit should be 1."]
29    #[inline(always)]
30    pub fn spi_smem_ecc_addr_en(&self) -> SPI_SMEM_ECC_ADDR_EN_R {
31        SPI_SMEM_ECC_ADDR_EN_R::new(((self.bits >> 20) & 1) != 0)
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37        f.debug_struct("SPI_SMEM_ECC_CTRL")
38            .field(
39                "spi_smem_ecc_err_int_en",
40                &format_args!("{}", self.spi_smem_ecc_err_int_en().bit()),
41            )
42            .field(
43                "spi_smem_page_size",
44                &format_args!("{}", self.spi_smem_page_size().bits()),
45            )
46            .field(
47                "spi_smem_ecc_addr_en",
48                &format_args!("{}", self.spi_smem_ecc_addr_en().bit()),
49            )
50            .finish()
51    }
52}
53#[cfg(feature = "impl-register-debug")]
54impl core::fmt::Debug for crate::generic::Reg<SPI_SMEM_ECC_CTRL_SPEC> {
55    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
56        core::fmt::Debug::fmt(&self.read(), f)
57    }
58}
59impl W {
60    #[doc = "Bit 17 - Set this bit to calculate the error times of MSPI ECC read when accesses to external RAM."]
61    #[inline(always)]
62    #[must_use]
63    pub fn spi_smem_ecc_err_int_en(&mut self) -> SPI_SMEM_ECC_ERR_INT_EN_W<SPI_SMEM_ECC_CTRL_SPEC> {
64        SPI_SMEM_ECC_ERR_INT_EN_W::new(self, 17)
65    }
66    #[doc = "Bits 18:19 - Set the page size of the external RAM accessed by MSPI. 0: 256 bytes. 1: 512 bytes. 2: 1024 bytes. 3: 2048 bytes."]
67    #[inline(always)]
68    #[must_use]
69    pub fn spi_smem_page_size(&mut self) -> SPI_SMEM_PAGE_SIZE_W<SPI_SMEM_ECC_CTRL_SPEC> {
70        SPI_SMEM_PAGE_SIZE_W::new(self, 18)
71    }
72    #[doc = "Bit 20 - Set this bit to enable MSPI ECC address conversion, no matter MSPI accesses to the ECC region or non-ECC region of external RAM. If there is no ECC region in external RAM, this bit should be 0. Otherwise, this bit should be 1."]
73    #[inline(always)]
74    #[must_use]
75    pub fn spi_smem_ecc_addr_en(&mut self) -> SPI_SMEM_ECC_ADDR_EN_W<SPI_SMEM_ECC_CTRL_SPEC> {
76        SPI_SMEM_ECC_ADDR_EN_W::new(self, 20)
77    }
78}
79#[doc = "MSPI ECC control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_smem_ecc_ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spi_smem_ecc_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
80pub struct SPI_SMEM_ECC_CTRL_SPEC;
81impl crate::RegisterSpec for SPI_SMEM_ECC_CTRL_SPEC {
82    type Ux = u32;
83}
84#[doc = "`read()` method returns [`spi_smem_ecc_ctrl::R`](R) reader structure"]
85impl crate::Readable for SPI_SMEM_ECC_CTRL_SPEC {}
86#[doc = "`write(|w| ..)` method takes [`spi_smem_ecc_ctrl::W`](W) writer structure"]
87impl crate::Writable for SPI_SMEM_ECC_CTRL_SPEC {
88    type Safety = crate::Unsafe;
89    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
90    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
91}
92#[doc = "`reset()` method sets SPI_SMEM_ECC_CTRL to value 0x0008_0000"]
93impl crate::Resettable for SPI_SMEM_ECC_CTRL_SPEC {
94    const RESET_VALUE: u32 = 0x0008_0000;
95}
esp32p4/spi0/spi_smem_ecc_ctrl.rs

esp32p4/spi0/
spi_smem_ecc_ctrl.rs
