esp32p4/sdhost/
emmcddr.rs

1#[doc = "Register `EMMCDDR` reader"]
2pub type R = crate::R<EMMCDDR_SPEC>;
3#[doc = "Register `EMMCDDR` writer"]
4pub type W = crate::W<EMMCDDR_SPEC>;
5#[doc = "Field `HALFSTARTBIT` reader - Control for start bit detection mechanism duration of start bit.Each bit refers to one slot.Set this bit to 1 for eMMC4.5 and above,set to 0 for SD applications.For eMMC4.5,start bit can be: 1'b0-Full cycle. 1'b1-less than one full cycle."]
6pub type HALFSTARTBIT_R = crate::FieldReader;
7#[doc = "Field `HALFSTARTBIT` writer - Control for start bit detection mechanism duration of start bit.Each bit refers to one slot.Set this bit to 1 for eMMC4.5 and above,set to 0 for SD applications.For eMMC4.5,start bit can be: 1'b0-Full cycle. 1'b1-less than one full cycle."]
8pub type HALFSTARTBIT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9#[doc = "Field `HS400_MODE` reader - Set 1 to enable HS400 mode."]
10pub type HS400_MODE_R = crate::BitReader;
11#[doc = "Field `HS400_MODE` writer - Set 1 to enable HS400 mode."]
12pub type HS400_MODE_W<'a, REG> = crate::BitWriter<'a, REG>;
13impl R {
14    #[doc = "Bits 0:1 - Control for start bit detection mechanism duration of start bit.Each bit refers to one slot.Set this bit to 1 for eMMC4.5 and above,set to 0 for SD applications.For eMMC4.5,start bit can be: 1'b0-Full cycle. 1'b1-less than one full cycle."]
15    #[inline(always)]
16    pub fn halfstartbit(&self) -> HALFSTARTBIT_R {
17        HALFSTARTBIT_R::new((self.bits & 3) as u8)
18    }
19    #[doc = "Bit 31 - Set 1 to enable HS400 mode."]
20    #[inline(always)]
21    pub fn hs400_mode(&self) -> HS400_MODE_R {
22        HS400_MODE_R::new(((self.bits >> 31) & 1) != 0)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("EMMCDDR")
29            .field(
30                "halfstartbit",
31                &format_args!("{}", self.halfstartbit().bits()),
32            )
33            .field("hs400_mode", &format_args!("{}", self.hs400_mode().bit()))
34            .finish()
35    }
36}
37#[cfg(feature = "impl-register-debug")]
38impl core::fmt::Debug for crate::generic::Reg<EMMCDDR_SPEC> {
39    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
40        core::fmt::Debug::fmt(&self.read(), f)
41    }
42}
43impl W {
44    #[doc = "Bits 0:1 - Control for start bit detection mechanism duration of start bit.Each bit refers to one slot.Set this bit to 1 for eMMC4.5 and above,set to 0 for SD applications.For eMMC4.5,start bit can be: 1'b0-Full cycle. 1'b1-less than one full cycle."]
45    #[inline(always)]
46    #[must_use]
47    pub fn halfstartbit(&mut self) -> HALFSTARTBIT_W<EMMCDDR_SPEC> {
48        HALFSTARTBIT_W::new(self, 0)
49    }
50    #[doc = "Bit 31 - Set 1 to enable HS400 mode."]
51    #[inline(always)]
52    #[must_use]
53    pub fn hs400_mode(&mut self) -> HS400_MODE_W<EMMCDDR_SPEC> {
54        HS400_MODE_W::new(self, 31)
55    }
56}
57#[doc = "eMMC DDR register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`emmcddr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`emmcddr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
58pub struct EMMCDDR_SPEC;
59impl crate::RegisterSpec for EMMCDDR_SPEC {
60    type Ux = u32;
61}
62#[doc = "`read()` method returns [`emmcddr::R`](R) reader structure"]
63impl crate::Readable for EMMCDDR_SPEC {}
64#[doc = "`write(|w| ..)` method takes [`emmcddr::W`](W) writer structure"]
65impl crate::Writable for EMMCDDR_SPEC {
66    type Safety = crate::Unsafe;
67    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
68    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
69}
70#[doc = "`reset()` method sets EMMCDDR to value 0"]
71impl crate::Resettable for EMMCDDR_SPEC {
72    const RESET_VALUE: u32 = 0;
73}
esp32p4/sdhost/emmcddr.rs

esp32p4/sdhost/
emmcddr.rs
