1#[doc = "Register `CLKENA` reader"]
2pub type R = crate::R<CLKENA_SPEC>;
3#[doc = "Register `CLKENA` writer"]
4pub type W = crate::W<CLKENA_SPEC>;
5#[doc = "Field `CCLK_ENABLE` reader - Clock-enable control for two SD card clocks and one MMC card clock is supported. One bit per card. 0: Clock disabled; 1: Clock enabled."]
6pub type CCLK_ENABLE_R = crate::FieldReader;
7#[doc = "Field `CCLK_ENABLE` writer - Clock-enable control for two SD card clocks and one MMC card clock is supported. One bit per card. 0: Clock disabled; 1: Clock enabled."]
8pub type CCLK_ENABLE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9#[doc = "Field `LP_ENABLE` reader - Disable clock when the card is in IDLE state. One bit per card. 0: clock disabled; 1: clock enabled."]
10pub type LP_ENABLE_R = crate::FieldReader;
11#[doc = "Field `LP_ENABLE` writer - Disable clock when the card is in IDLE state. One bit per card. 0: clock disabled; 1: clock enabled."]
12pub type LP_ENABLE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
13impl R {
14 #[doc = "Bits 0:1 - Clock-enable control for two SD card clocks and one MMC card clock is supported. One bit per card. 0: Clock disabled; 1: Clock enabled."]
15 #[inline(always)]
16 pub fn cclk_enable(&self) -> CCLK_ENABLE_R {
17 CCLK_ENABLE_R::new((self.bits & 3) as u8)
18 }
19 #[doc = "Bits 16:17 - Disable clock when the card is in IDLE state. One bit per card. 0: clock disabled; 1: clock enabled."]
20 #[inline(always)]
21 pub fn lp_enable(&self) -> LP_ENABLE_R {
22 LP_ENABLE_R::new(((self.bits >> 16) & 3) as u8)
23 }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28 f.debug_struct("CLKENA")
29 .field(
30 "cclk_enable",
31 &format_args!("{}", self.cclk_enable().bits()),
32 )
33 .field("lp_enable", &format_args!("{}", self.lp_enable().bits()))
34 .finish()
35 }
36}
37#[cfg(feature = "impl-register-debug")]
38impl core::fmt::Debug for crate::generic::Reg<CLKENA_SPEC> {
39 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
40 core::fmt::Debug::fmt(&self.read(), f)
41 }
42}
43impl W {
44 #[doc = "Bits 0:1 - Clock-enable control for two SD card clocks and one MMC card clock is supported. One bit per card. 0: Clock disabled; 1: Clock enabled."]
45 #[inline(always)]
46 #[must_use]
47 pub fn cclk_enable(&mut self) -> CCLK_ENABLE_W<CLKENA_SPEC> {
48 CCLK_ENABLE_W::new(self, 0)
49 }
50 #[doc = "Bits 16:17 - Disable clock when the card is in IDLE state. One bit per card. 0: clock disabled; 1: clock enabled."]
51 #[inline(always)]
52 #[must_use]
53 pub fn lp_enable(&mut self) -> LP_ENABLE_W<CLKENA_SPEC> {
54 LP_ENABLE_W::new(self, 16)
55 }
56}
57#[doc = "Clock enable register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkena::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkena::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
58pub struct CLKENA_SPEC;
59impl crate::RegisterSpec for CLKENA_SPEC {
60 type Ux = u32;
61}
62#[doc = "`read()` method returns [`clkena::R`](R) reader structure"]
63impl crate::Readable for CLKENA_SPEC {}
64#[doc = "`write(|w| ..)` method takes [`clkena::W`](W) writer structure"]
65impl crate::Writable for CLKENA_SPEC {
66 type Safety = crate::Unsafe;
67 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
68 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
69}
70#[doc = "`reset()` method sets CLKENA to value 0"]
71impl crate::Resettable for CLKENA_SPEC {
72 const RESET_VALUE: u32 = 0;
73}