esp32p4/mipi_csi_bridge/
dma_req_cfg.rs

1#[doc = "Register `DMA_REQ_CFG` reader"]
2pub type R = crate::R<DMA_REQ_CFG_SPEC>;
3#[doc = "Register `DMA_REQ_CFG` writer"]
4pub type W = crate::W<DMA_REQ_CFG_SPEC>;
5#[doc = "Field `DMA_BURST_LEN` reader - DMA burst length."]
6pub type DMA_BURST_LEN_R = crate::FieldReader<u16>;
7#[doc = "Field `DMA_BURST_LEN` writer - DMA burst length."]
8pub type DMA_BURST_LEN_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>;
9#[doc = "Field `DMA_CFG_UPD_BY_BLK` reader - 1: reg_dma_burst_len &amp; reg_dma_burst_len will be updated by dma block finish. 0: updated by frame."]
10pub type DMA_CFG_UPD_BY_BLK_R = crate::BitReader;
11#[doc = "Field `DMA_CFG_UPD_BY_BLK` writer - 1: reg_dma_burst_len &amp; reg_dma_burst_len will be updated by dma block finish. 0: updated by frame."]
12pub type DMA_CFG_UPD_BY_BLK_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `DMA_FORCE_RD_STATUS` reader - 1: mask dma request when reading frame info. 0: disable mask."]
14pub type DMA_FORCE_RD_STATUS_R = crate::BitReader;
15#[doc = "Field `DMA_FORCE_RD_STATUS` writer - 1: mask dma request when reading frame info. 0: disable mask."]
16pub type DMA_FORCE_RD_STATUS_W<'a, REG> = crate::BitWriter<'a, REG>;
17impl R {
18    #[doc = "Bits 0:11 - DMA burst length."]
19    #[inline(always)]
20    pub fn dma_burst_len(&self) -> DMA_BURST_LEN_R {
21        DMA_BURST_LEN_R::new((self.bits & 0x0fff) as u16)
22    }
23    #[doc = "Bit 12 - 1: reg_dma_burst_len &amp; reg_dma_burst_len will be updated by dma block finish. 0: updated by frame."]
24    #[inline(always)]
25    pub fn dma_cfg_upd_by_blk(&self) -> DMA_CFG_UPD_BY_BLK_R {
26        DMA_CFG_UPD_BY_BLK_R::new(((self.bits >> 12) & 1) != 0)
27    }
28    #[doc = "Bit 16 - 1: mask dma request when reading frame info. 0: disable mask."]
29    #[inline(always)]
30    pub fn dma_force_rd_status(&self) -> DMA_FORCE_RD_STATUS_R {
31        DMA_FORCE_RD_STATUS_R::new(((self.bits >> 16) & 1) != 0)
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37        f.debug_struct("DMA_REQ_CFG")
38            .field(
39                "dma_burst_len",
40                &format_args!("{}", self.dma_burst_len().bits()),
41            )
42            .field(
43                "dma_cfg_upd_by_blk",
44                &format_args!("{}", self.dma_cfg_upd_by_blk().bit()),
45            )
46            .field(
47                "dma_force_rd_status",
48                &format_args!("{}", self.dma_force_rd_status().bit()),
49            )
50            .finish()
51    }
52}
53#[cfg(feature = "impl-register-debug")]
54impl core::fmt::Debug for crate::generic::Reg<DMA_REQ_CFG_SPEC> {
55    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
56        core::fmt::Debug::fmt(&self.read(), f)
57    }
58}
59impl W {
60    #[doc = "Bits 0:11 - DMA burst length."]
61    #[inline(always)]
62    #[must_use]
63    pub fn dma_burst_len(&mut self) -> DMA_BURST_LEN_W<DMA_REQ_CFG_SPEC> {
64        DMA_BURST_LEN_W::new(self, 0)
65    }
66    #[doc = "Bit 12 - 1: reg_dma_burst_len &amp; reg_dma_burst_len will be updated by dma block finish. 0: updated by frame."]
67    #[inline(always)]
68    #[must_use]
69    pub fn dma_cfg_upd_by_blk(&mut self) -> DMA_CFG_UPD_BY_BLK_W<DMA_REQ_CFG_SPEC> {
70        DMA_CFG_UPD_BY_BLK_W::new(self, 12)
71    }
72    #[doc = "Bit 16 - 1: mask dma request when reading frame info. 0: disable mask."]
73    #[inline(always)]
74    #[must_use]
75    pub fn dma_force_rd_status(&mut self) -> DMA_FORCE_RD_STATUS_W<DMA_REQ_CFG_SPEC> {
76        DMA_FORCE_RD_STATUS_W::new(self, 16)
77    }
78}
79#[doc = "dma request configuration.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_req_cfg::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_req_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
80pub struct DMA_REQ_CFG_SPEC;
81impl crate::RegisterSpec for DMA_REQ_CFG_SPEC {
82    type Ux = u32;
83}
84#[doc = "`read()` method returns [`dma_req_cfg::R`](R) reader structure"]
85impl crate::Readable for DMA_REQ_CFG_SPEC {}
86#[doc = "`write(|w| ..)` method takes [`dma_req_cfg::W`](W) writer structure"]
87impl crate::Writable for DMA_REQ_CFG_SPEC {
88    type Safety = crate::Unsafe;
89    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
90    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
91}
92#[doc = "`reset()` method sets DMA_REQ_CFG to value 0x80"]
93impl crate::Resettable for DMA_REQ_CFG_SPEC {
94    const RESET_VALUE: u32 = 0x80;
95}
esp32p4/mipi_csi_bridge/dma_req_cfg.rs

esp32p4/mipi_csi_bridge/
dma_req_cfg.rs
