esp32p4/lp_tsens/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub type R = crate::R<CTRL_SPEC>;
3#[doc = "Register `CTRL` writer"]
4pub type W = crate::W<CTRL_SPEC>;
5#[doc = "Field `OUT` reader - Temperature sensor data out."]
6pub type OUT_R = crate::FieldReader;
7#[doc = "Field `READY` reader - Indicate temperature sensor out ready."]
8pub type READY_R = crate::BitReader;
9#[doc = "Field `SAMPLE_EN` reader - Enable sample signal for wakeup module."]
10pub type SAMPLE_EN_R = crate::BitReader;
11#[doc = "Field `SAMPLE_EN` writer - Enable sample signal for wakeup module."]
12pub type SAMPLE_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `WAKEUP_MASK` reader - Wake up signal mask."]
14pub type WAKEUP_MASK_R = crate::BitReader;
15#[doc = "Field `WAKEUP_MASK` writer - Wake up signal mask."]
16pub type WAKEUP_MASK_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `INT_EN` reader - Enable temperature sensor to send out interrupt."]
18pub type INT_EN_R = crate::BitReader;
19#[doc = "Field `INT_EN` writer - Enable temperature sensor to send out interrupt."]
20pub type INT_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `IN_INV` reader - Invert temperature sensor data."]
22pub type IN_INV_R = crate::BitReader;
23#[doc = "Field `IN_INV` writer - Invert temperature sensor data."]
24pub type IN_INV_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `CLK_DIV` reader - Temperature sensor clock divider."]
26pub type CLK_DIV_R = crate::FieldReader;
27#[doc = "Field `CLK_DIV` writer - Temperature sensor clock divider."]
28pub type CLK_DIV_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
29#[doc = "Field `POWER_UP` reader - Temperature sensor power up."]
30pub type POWER_UP_R = crate::BitReader;
31#[doc = "Field `POWER_UP` writer - Temperature sensor power up."]
32pub type POWER_UP_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `POWER_UP_FORCE` reader - 1: dump out &amp; power up controlled by SW, 0: by FSM."]
34pub type POWER_UP_FORCE_R = crate::BitReader;
35#[doc = "Field `POWER_UP_FORCE` writer - 1: dump out &amp; power up controlled by SW, 0: by FSM."]
36pub type POWER_UP_FORCE_W<'a, REG> = crate::BitWriter<'a, REG>;
37impl R {
38    #[doc = "Bits 0:7 - Temperature sensor data out."]
39    #[inline(always)]
40    pub fn out(&self) -> OUT_R {
41        OUT_R::new((self.bits & 0xff) as u8)
42    }
43    #[doc = "Bit 8 - Indicate temperature sensor out ready."]
44    #[inline(always)]
45    pub fn ready(&self) -> READY_R {
46        READY_R::new(((self.bits >> 8) & 1) != 0)
47    }
48    #[doc = "Bit 9 - Enable sample signal for wakeup module."]
49    #[inline(always)]
50    pub fn sample_en(&self) -> SAMPLE_EN_R {
51        SAMPLE_EN_R::new(((self.bits >> 9) & 1) != 0)
52    }
53    #[doc = "Bit 10 - Wake up signal mask."]
54    #[inline(always)]
55    pub fn wakeup_mask(&self) -> WAKEUP_MASK_R {
56        WAKEUP_MASK_R::new(((self.bits >> 10) & 1) != 0)
57    }
58    #[doc = "Bit 12 - Enable temperature sensor to send out interrupt."]
59    #[inline(always)]
60    pub fn int_en(&self) -> INT_EN_R {
61        INT_EN_R::new(((self.bits >> 12) & 1) != 0)
62    }
63    #[doc = "Bit 13 - Invert temperature sensor data."]
64    #[inline(always)]
65    pub fn in_inv(&self) -> IN_INV_R {
66        IN_INV_R::new(((self.bits >> 13) & 1) != 0)
67    }
68    #[doc = "Bits 14:21 - Temperature sensor clock divider."]
69    #[inline(always)]
70    pub fn clk_div(&self) -> CLK_DIV_R {
71        CLK_DIV_R::new(((self.bits >> 14) & 0xff) as u8)
72    }
73    #[doc = "Bit 22 - Temperature sensor power up."]
74    #[inline(always)]
75    pub fn power_up(&self) -> POWER_UP_R {
76        POWER_UP_R::new(((self.bits >> 22) & 1) != 0)
77    }
78    #[doc = "Bit 23 - 1: dump out &amp; power up controlled by SW, 0: by FSM."]
79    #[inline(always)]
80    pub fn power_up_force(&self) -> POWER_UP_FORCE_R {
81        POWER_UP_FORCE_R::new(((self.bits >> 23) & 1) != 0)
82    }
83}
84#[cfg(feature = "impl-register-debug")]
85impl core::fmt::Debug for R {
86    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
87        f.debug_struct("CTRL")
88            .field("out", &format_args!("{}", self.out().bits()))
89            .field("ready", &format_args!("{}", self.ready().bit()))
90            .field("sample_en", &format_args!("{}", self.sample_en().bit()))
91            .field("wakeup_mask", &format_args!("{}", self.wakeup_mask().bit()))
92            .field("int_en", &format_args!("{}", self.int_en().bit()))
93            .field("in_inv", &format_args!("{}", self.in_inv().bit()))
94            .field("clk_div", &format_args!("{}", self.clk_div().bits()))
95            .field("power_up", &format_args!("{}", self.power_up().bit()))
96            .field(
97                "power_up_force",
98                &format_args!("{}", self.power_up_force().bit()),
99            )
100            .finish()
101    }
102}
103#[cfg(feature = "impl-register-debug")]
104impl core::fmt::Debug for crate::generic::Reg<CTRL_SPEC> {
105    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
106        core::fmt::Debug::fmt(&self.read(), f)
107    }
108}
109impl W {
110    #[doc = "Bit 9 - Enable sample signal for wakeup module."]
111    #[inline(always)]
112    #[must_use]
113    pub fn sample_en(&mut self) -> SAMPLE_EN_W<CTRL_SPEC> {
114        SAMPLE_EN_W::new(self, 9)
115    }
116    #[doc = "Bit 10 - Wake up signal mask."]
117    #[inline(always)]
118    #[must_use]
119    pub fn wakeup_mask(&mut self) -> WAKEUP_MASK_W<CTRL_SPEC> {
120        WAKEUP_MASK_W::new(self, 10)
121    }
122    #[doc = "Bit 12 - Enable temperature sensor to send out interrupt."]
123    #[inline(always)]
124    #[must_use]
125    pub fn int_en(&mut self) -> INT_EN_W<CTRL_SPEC> {
126        INT_EN_W::new(self, 12)
127    }
128    #[doc = "Bit 13 - Invert temperature sensor data."]
129    #[inline(always)]
130    #[must_use]
131    pub fn in_inv(&mut self) -> IN_INV_W<CTRL_SPEC> {
132        IN_INV_W::new(self, 13)
133    }
134    #[doc = "Bits 14:21 - Temperature sensor clock divider."]
135    #[inline(always)]
136    #[must_use]
137    pub fn clk_div(&mut self) -> CLK_DIV_W<CTRL_SPEC> {
138        CLK_DIV_W::new(self, 14)
139    }
140    #[doc = "Bit 22 - Temperature sensor power up."]
141    #[inline(always)]
142    #[must_use]
143    pub fn power_up(&mut self) -> POWER_UP_W<CTRL_SPEC> {
144        POWER_UP_W::new(self, 22)
145    }
146    #[doc = "Bit 23 - 1: dump out &amp; power up controlled by SW, 0: by FSM."]
147    #[inline(always)]
148    #[must_use]
149    pub fn power_up_force(&mut self) -> POWER_UP_FORCE_W<CTRL_SPEC> {
150        POWER_UP_FORCE_W::new(self, 23)
151    }
152}
153#[doc = "Tsens configuration.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
154pub struct CTRL_SPEC;
155impl crate::RegisterSpec for CTRL_SPEC {
156    type Ux = u32;
157}
158#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"]
159impl crate::Readable for CTRL_SPEC {}
160#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"]
161impl crate::Writable for CTRL_SPEC {
162    type Safety = crate::Unsafe;
163    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
164    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
165}
166#[doc = "`reset()` method sets CTRL to value 0x0001_9400"]
167impl crate::Resettable for CTRL_SPEC {
168    const RESET_VALUE: u32 = 0x0001_9400;
169}
esp32p4/lp_tsens/ctrl.rs

esp32p4/lp_tsens/
ctrl.rs
