esp32p4/lp_aon_clkrst/
lp_aonclkrst_hpsys_apm_reset_bypass.rs

1#[doc = "Register `LP_AONCLKRST_HPSYS_APM_RESET_BYPASS` reader"]
2pub type R = crate::R<LP_AONCLKRST_HPSYS_APM_RESET_BYPASS_SPEC>;
3#[doc = "Register `LP_AONCLKRST_HPSYS_APM_RESET_BYPASS` writer"]
4pub type W = crate::W<LP_AONCLKRST_HPSYS_APM_RESET_BYPASS_SPEC>;
5#[doc = "Field `LP_AONCLKRST_HPSYS_APM_RESET_BYPASS` reader - reserved"]
6pub type LP_AONCLKRST_HPSYS_APM_RESET_BYPASS_R = crate::FieldReader<u32>;
7#[doc = "Field `LP_AONCLKRST_HPSYS_APM_RESET_BYPASS` writer - reserved"]
8pub type LP_AONCLKRST_HPSYS_APM_RESET_BYPASS_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
9impl R {
10    #[doc = "Bits 0:31 - reserved"]
11    #[inline(always)]
12    pub fn lp_aonclkrst_hpsys_apm_reset_bypass(&self) -> LP_AONCLKRST_HPSYS_APM_RESET_BYPASS_R {
13        LP_AONCLKRST_HPSYS_APM_RESET_BYPASS_R::new(self.bits)
14    }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("LP_AONCLKRST_HPSYS_APM_RESET_BYPASS")
20            .field(
21                "lp_aonclkrst_hpsys_apm_reset_bypass",
22                &format_args!("{}", self.lp_aonclkrst_hpsys_apm_reset_bypass().bits()),
23            )
24            .finish()
25    }
26}
27#[cfg(feature = "impl-register-debug")]
28impl core::fmt::Debug for crate::generic::Reg<LP_AONCLKRST_HPSYS_APM_RESET_BYPASS_SPEC> {
29    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
30        core::fmt::Debug::fmt(&self.read(), f)
31    }
32}
33impl W {
34    #[doc = "Bits 0:31 - reserved"]
35    #[inline(always)]
36    #[must_use]
37    pub fn lp_aonclkrst_hpsys_apm_reset_bypass(
38        &mut self,
39    ) -> LP_AONCLKRST_HPSYS_APM_RESET_BYPASS_W<LP_AONCLKRST_HPSYS_APM_RESET_BYPASS_SPEC> {
40        LP_AONCLKRST_HPSYS_APM_RESET_BYPASS_W::new(self, 0)
41    }
42}
43#[doc = "need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lp_aonclkrst_hpsys_apm_reset_bypass::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lp_aonclkrst_hpsys_apm_reset_bypass::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
44pub struct LP_AONCLKRST_HPSYS_APM_RESET_BYPASS_SPEC;
45impl crate::RegisterSpec for LP_AONCLKRST_HPSYS_APM_RESET_BYPASS_SPEC {
46    type Ux = u32;
47}
48#[doc = "`read()` method returns [`lp_aonclkrst_hpsys_apm_reset_bypass::R`](R) reader structure"]
49impl crate::Readable for LP_AONCLKRST_HPSYS_APM_RESET_BYPASS_SPEC {}
50#[doc = "`write(|w| ..)` method takes [`lp_aonclkrst_hpsys_apm_reset_bypass::W`](W) writer structure"]
51impl crate::Writable for LP_AONCLKRST_HPSYS_APM_RESET_BYPASS_SPEC {
52    type Safety = crate::Unsafe;
53    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
54    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
55}
56#[doc = "`reset()` method sets LP_AONCLKRST_HPSYS_APM_RESET_BYPASS to value 0xffff_ffff"]
57impl crate::Resettable for LP_AONCLKRST_HPSYS_APM_RESET_BYPASS_SPEC {
58    const RESET_VALUE: u32 = 0xffff_ffff;
59}
esp32p4/lp_aon_clkrst/lp_aonclkrst_hpsys_apm_reset_bypass.rs

esp32p4/lp_aon_clkrst/
lp_aonclkrst_hpsys_apm_reset_bypass.rs
