esp32p4/i2s0/
tx_pcm2pdm_conf1.rs

1#[doc = "Register `TX_PCM2PDM_CONF1` reader"]
2pub type R = crate::R<TX_PCM2PDM_CONF1_SPEC>;
3#[doc = "Register `TX_PCM2PDM_CONF1` writer"]
4pub type W = crate::W<TX_PCM2PDM_CONF1_SPEC>;
5#[doc = "Field `TX_PDM_FP` reader - I2S TX PDM Fp"]
6pub type TX_PDM_FP_R = crate::FieldReader<u16>;
7#[doc = "Field `TX_PDM_FP` writer - I2S TX PDM Fp"]
8pub type TX_PDM_FP_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
9#[doc = "Field `TX_PDM_FS` reader - I2S TX PDM Fs"]
10pub type TX_PDM_FS_R = crate::FieldReader<u16>;
11#[doc = "Field `TX_PDM_FS` writer - I2S TX PDM Fs"]
12pub type TX_PDM_FS_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
13#[doc = "Field `TX_IIR_HP_MULT12_5` reader - The fourth parameter of PDM TX IIR_HP filter stage 2 is (504 + I2S_TX_IIR_HP_MULT12_5\\[2:0\\])"]
14pub type TX_IIR_HP_MULT12_5_R = crate::FieldReader;
15#[doc = "Field `TX_IIR_HP_MULT12_5` writer - The fourth parameter of PDM TX IIR_HP filter stage 2 is (504 + I2S_TX_IIR_HP_MULT12_5\\[2:0\\])"]
16pub type TX_IIR_HP_MULT12_5_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
17#[doc = "Field `TX_IIR_HP_MULT12_0` reader - The fourth parameter of PDM TX IIR_HP filter stage 1 is (504 + I2S_TX_IIR_HP_MULT12_0\\[2:0\\])"]
18pub type TX_IIR_HP_MULT12_0_R = crate::FieldReader;
19#[doc = "Field `TX_IIR_HP_MULT12_0` writer - The fourth parameter of PDM TX IIR_HP filter stage 1 is (504 + I2S_TX_IIR_HP_MULT12_0\\[2:0\\])"]
20pub type TX_IIR_HP_MULT12_0_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
21impl R {
22    #[doc = "Bits 0:9 - I2S TX PDM Fp"]
23    #[inline(always)]
24    pub fn tx_pdm_fp(&self) -> TX_PDM_FP_R {
25        TX_PDM_FP_R::new((self.bits & 0x03ff) as u16)
26    }
27    #[doc = "Bits 10:19 - I2S TX PDM Fs"]
28    #[inline(always)]
29    pub fn tx_pdm_fs(&self) -> TX_PDM_FS_R {
30        TX_PDM_FS_R::new(((self.bits >> 10) & 0x03ff) as u16)
31    }
32    #[doc = "Bits 20:22 - The fourth parameter of PDM TX IIR_HP filter stage 2 is (504 + I2S_TX_IIR_HP_MULT12_5\\[2:0\\])"]
33    #[inline(always)]
34    pub fn tx_iir_hp_mult12_5(&self) -> TX_IIR_HP_MULT12_5_R {
35        TX_IIR_HP_MULT12_5_R::new(((self.bits >> 20) & 7) as u8)
36    }
37    #[doc = "Bits 23:25 - The fourth parameter of PDM TX IIR_HP filter stage 1 is (504 + I2S_TX_IIR_HP_MULT12_0\\[2:0\\])"]
38    #[inline(always)]
39    pub fn tx_iir_hp_mult12_0(&self) -> TX_IIR_HP_MULT12_0_R {
40        TX_IIR_HP_MULT12_0_R::new(((self.bits >> 23) & 7) as u8)
41    }
42}
43#[cfg(feature = "impl-register-debug")]
44impl core::fmt::Debug for R {
45    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
46        f.debug_struct("TX_PCM2PDM_CONF1")
47            .field("tx_pdm_fp", &format_args!("{}", self.tx_pdm_fp().bits()))
48            .field("tx_pdm_fs", &format_args!("{}", self.tx_pdm_fs().bits()))
49            .field(
50                "tx_iir_hp_mult12_5",
51                &format_args!("{}", self.tx_iir_hp_mult12_5().bits()),
52            )
53            .field(
54                "tx_iir_hp_mult12_0",
55                &format_args!("{}", self.tx_iir_hp_mult12_0().bits()),
56            )
57            .finish()
58    }
59}
60#[cfg(feature = "impl-register-debug")]
61impl core::fmt::Debug for crate::generic::Reg<TX_PCM2PDM_CONF1_SPEC> {
62    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
63        core::fmt::Debug::fmt(&self.read(), f)
64    }
65}
66impl W {
67    #[doc = "Bits 0:9 - I2S TX PDM Fp"]
68    #[inline(always)]
69    #[must_use]
70    pub fn tx_pdm_fp(&mut self) -> TX_PDM_FP_W<TX_PCM2PDM_CONF1_SPEC> {
71        TX_PDM_FP_W::new(self, 0)
72    }
73    #[doc = "Bits 10:19 - I2S TX PDM Fs"]
74    #[inline(always)]
75    #[must_use]
76    pub fn tx_pdm_fs(&mut self) -> TX_PDM_FS_W<TX_PCM2PDM_CONF1_SPEC> {
77        TX_PDM_FS_W::new(self, 10)
78    }
79    #[doc = "Bits 20:22 - The fourth parameter of PDM TX IIR_HP filter stage 2 is (504 + I2S_TX_IIR_HP_MULT12_5\\[2:0\\])"]
80    #[inline(always)]
81    #[must_use]
82    pub fn tx_iir_hp_mult12_5(&mut self) -> TX_IIR_HP_MULT12_5_W<TX_PCM2PDM_CONF1_SPEC> {
83        TX_IIR_HP_MULT12_5_W::new(self, 20)
84    }
85    #[doc = "Bits 23:25 - The fourth parameter of PDM TX IIR_HP filter stage 1 is (504 + I2S_TX_IIR_HP_MULT12_0\\[2:0\\])"]
86    #[inline(always)]
87    #[must_use]
88    pub fn tx_iir_hp_mult12_0(&mut self) -> TX_IIR_HP_MULT12_0_W<TX_PCM2PDM_CONF1_SPEC> {
89        TX_IIR_HP_MULT12_0_W::new(self, 23)
90    }
91}
92#[doc = "I2S TX PCM2PDM configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_pcm2pdm_conf1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tx_pcm2pdm_conf1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
93pub struct TX_PCM2PDM_CONF1_SPEC;
94impl crate::RegisterSpec for TX_PCM2PDM_CONF1_SPEC {
95    type Ux = u32;
96}
97#[doc = "`read()` method returns [`tx_pcm2pdm_conf1::R`](R) reader structure"]
98impl crate::Readable for TX_PCM2PDM_CONF1_SPEC {}
99#[doc = "`write(|w| ..)` method takes [`tx_pcm2pdm_conf1::W`](W) writer structure"]
100impl crate::Writable for TX_PCM2PDM_CONF1_SPEC {
101    type Safety = crate::Unsafe;
102    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
103    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
104}
105#[doc = "`reset()` method sets TX_PCM2PDM_CONF1 to value 0x03f7_83c0"]
106impl crate::Resettable for TX_PCM2PDM_CONF1_SPEC {
107    const RESET_VALUE: u32 = 0x03f7_83c0;
108}
esp32p4/i2s0/tx_pcm2pdm_conf1.rs

esp32p4/i2s0/
tx_pcm2pdm_conf1.rs
