esp32p4/hp_sys_clkrst/
dbg_clk_ctrl1.rs

1#[doc = "Register `DBG_CLK_CTRL1` reader"]
2pub type R = crate::R<DBG_CLK_CTRL1_SPEC>;
3#[doc = "Register `DBG_CLK_CTRL1` writer"]
4pub type W = crate::W<DBG_CLK_CTRL1_SPEC>;
5#[doc = "Field `DBG_CH1_DIV_NUM` reader - Reserved"]
6pub type DBG_CH1_DIV_NUM_R = crate::FieldReader;
7#[doc = "Field `DBG_CH1_DIV_NUM` writer - Reserved"]
8pub type DBG_CH1_DIV_NUM_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `DBG_CH2_DIV_NUM` reader - Reserved"]
10pub type DBG_CH2_DIV_NUM_R = crate::FieldReader;
11#[doc = "Field `DBG_CH2_DIV_NUM` writer - Reserved"]
12pub type DBG_CH2_DIV_NUM_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13#[doc = "Field `DBG_CH0_EN` reader - Reserved"]
14pub type DBG_CH0_EN_R = crate::BitReader;
15#[doc = "Field `DBG_CH0_EN` writer - Reserved"]
16pub type DBG_CH0_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `DBG_CH1_EN` reader - Reserved"]
18pub type DBG_CH1_EN_R = crate::BitReader;
19#[doc = "Field `DBG_CH1_EN` writer - Reserved"]
20pub type DBG_CH1_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `DBG_CH2_EN` reader - Reserved"]
22pub type DBG_CH2_EN_R = crate::BitReader;
23#[doc = "Field `DBG_CH2_EN` writer - Reserved"]
24pub type DBG_CH2_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
25impl R {
26    #[doc = "Bits 0:7 - Reserved"]
27    #[inline(always)]
28    pub fn dbg_ch1_div_num(&self) -> DBG_CH1_DIV_NUM_R {
29        DBG_CH1_DIV_NUM_R::new((self.bits & 0xff) as u8)
30    }
31    #[doc = "Bits 8:15 - Reserved"]
32    #[inline(always)]
33    pub fn dbg_ch2_div_num(&self) -> DBG_CH2_DIV_NUM_R {
34        DBG_CH2_DIV_NUM_R::new(((self.bits >> 8) & 0xff) as u8)
35    }
36    #[doc = "Bit 16 - Reserved"]
37    #[inline(always)]
38    pub fn dbg_ch0_en(&self) -> DBG_CH0_EN_R {
39        DBG_CH0_EN_R::new(((self.bits >> 16) & 1) != 0)
40    }
41    #[doc = "Bit 17 - Reserved"]
42    #[inline(always)]
43    pub fn dbg_ch1_en(&self) -> DBG_CH1_EN_R {
44        DBG_CH1_EN_R::new(((self.bits >> 17) & 1) != 0)
45    }
46    #[doc = "Bit 18 - Reserved"]
47    #[inline(always)]
48    pub fn dbg_ch2_en(&self) -> DBG_CH2_EN_R {
49        DBG_CH2_EN_R::new(((self.bits >> 18) & 1) != 0)
50    }
51}
52#[cfg(feature = "impl-register-debug")]
53impl core::fmt::Debug for R {
54    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
55        f.debug_struct("DBG_CLK_CTRL1")
56            .field(
57                "dbg_ch1_div_num",
58                &format_args!("{}", self.dbg_ch1_div_num().bits()),
59            )
60            .field(
61                "dbg_ch2_div_num",
62                &format_args!("{}", self.dbg_ch2_div_num().bits()),
63            )
64            .field("dbg_ch0_en", &format_args!("{}", self.dbg_ch0_en().bit()))
65            .field("dbg_ch1_en", &format_args!("{}", self.dbg_ch1_en().bit()))
66            .field("dbg_ch2_en", &format_args!("{}", self.dbg_ch2_en().bit()))
67            .finish()
68    }
69}
70#[cfg(feature = "impl-register-debug")]
71impl core::fmt::Debug for crate::generic::Reg<DBG_CLK_CTRL1_SPEC> {
72    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
73        core::fmt::Debug::fmt(&self.read(), f)
74    }
75}
76impl W {
77    #[doc = "Bits 0:7 - Reserved"]
78    #[inline(always)]
79    #[must_use]
80    pub fn dbg_ch1_div_num(&mut self) -> DBG_CH1_DIV_NUM_W<DBG_CLK_CTRL1_SPEC> {
81        DBG_CH1_DIV_NUM_W::new(self, 0)
82    }
83    #[doc = "Bits 8:15 - Reserved"]
84    #[inline(always)]
85    #[must_use]
86    pub fn dbg_ch2_div_num(&mut self) -> DBG_CH2_DIV_NUM_W<DBG_CLK_CTRL1_SPEC> {
87        DBG_CH2_DIV_NUM_W::new(self, 8)
88    }
89    #[doc = "Bit 16 - Reserved"]
90    #[inline(always)]
91    #[must_use]
92    pub fn dbg_ch0_en(&mut self) -> DBG_CH0_EN_W<DBG_CLK_CTRL1_SPEC> {
93        DBG_CH0_EN_W::new(self, 16)
94    }
95    #[doc = "Bit 17 - Reserved"]
96    #[inline(always)]
97    #[must_use]
98    pub fn dbg_ch1_en(&mut self) -> DBG_CH1_EN_W<DBG_CLK_CTRL1_SPEC> {
99        DBG_CH1_EN_W::new(self, 17)
100    }
101    #[doc = "Bit 18 - Reserved"]
102    #[inline(always)]
103    #[must_use]
104    pub fn dbg_ch2_en(&mut self) -> DBG_CH2_EN_W<DBG_CLK_CTRL1_SPEC> {
105        DBG_CH2_EN_W::new(self, 18)
106    }
107}
108#[doc = "Reserved\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dbg_clk_ctrl1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dbg_clk_ctrl1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
109pub struct DBG_CLK_CTRL1_SPEC;
110impl crate::RegisterSpec for DBG_CLK_CTRL1_SPEC {
111    type Ux = u32;
112}
113#[doc = "`read()` method returns [`dbg_clk_ctrl1::R`](R) reader structure"]
114impl crate::Readable for DBG_CLK_CTRL1_SPEC {}
115#[doc = "`write(|w| ..)` method takes [`dbg_clk_ctrl1::W`](W) writer structure"]
116impl crate::Writable for DBG_CLK_CTRL1_SPEC {
117    type Safety = crate::Unsafe;
118    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
119    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
120}
121#[doc = "`reset()` method sets DBG_CLK_CTRL1 to value 0x0303"]
122impl crate::Resettable for DBG_CLK_CTRL1_SPEC {
123    const RESET_VALUE: u32 = 0x0303;
124}
esp32p4/hp_sys_clkrst/dbg_clk_ctrl1.rs

esp32p4/hp_sys_clkrst/
dbg_clk_ctrl1.rs
