esp32p4/hp_sys/
gmac_ctrl0.rs

1#[doc = "Register `GMAC_CTRL0` reader"]
2pub type R = crate::R<GMAC_CTRL0_SPEC>;
3#[doc = "Register `GMAC_CTRL0` writer"]
4pub type W = crate::W<GMAC_CTRL0_SPEC>;
5#[doc = "Field `PTP_PPS` reader - N/A"]
6pub type PTP_PPS_R = crate::BitReader;
7#[doc = "Field `SBD_FLOWCTRL` reader - N/A"]
8pub type SBD_FLOWCTRL_R = crate::BitReader;
9#[doc = "Field `SBD_FLOWCTRL` writer - N/A"]
10pub type SBD_FLOWCTRL_W<'a, REG> = crate::BitWriter<'a, REG>;
11#[doc = "Field `PHY_INTF_SEL` reader - N/A"]
12pub type PHY_INTF_SEL_R = crate::FieldReader;
13#[doc = "Field `PHY_INTF_SEL` writer - N/A"]
14pub type PHY_INTF_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
15#[doc = "Field `GMAC_MEM_CLK_FORCE_ON` reader - N/A"]
16pub type GMAC_MEM_CLK_FORCE_ON_R = crate::BitReader;
17#[doc = "Field `GMAC_MEM_CLK_FORCE_ON` writer - N/A"]
18pub type GMAC_MEM_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
19#[doc = "Field `GMAC_RST_CLK_TX_N` reader - N/A"]
20pub type GMAC_RST_CLK_TX_N_R = crate::BitReader;
21#[doc = "Field `GMAC_RST_CLK_RX_N` reader - N/A"]
22pub type GMAC_RST_CLK_RX_N_R = crate::BitReader;
23impl R {
24    #[doc = "Bit 0 - N/A"]
25    #[inline(always)]
26    pub fn ptp_pps(&self) -> PTP_PPS_R {
27        PTP_PPS_R::new((self.bits & 1) != 0)
28    }
29    #[doc = "Bit 1 - N/A"]
30    #[inline(always)]
31    pub fn sbd_flowctrl(&self) -> SBD_FLOWCTRL_R {
32        SBD_FLOWCTRL_R::new(((self.bits >> 1) & 1) != 0)
33    }
34    #[doc = "Bits 2:4 - N/A"]
35    #[inline(always)]
36    pub fn phy_intf_sel(&self) -> PHY_INTF_SEL_R {
37        PHY_INTF_SEL_R::new(((self.bits >> 2) & 7) as u8)
38    }
39    #[doc = "Bit 5 - N/A"]
40    #[inline(always)]
41    pub fn gmac_mem_clk_force_on(&self) -> GMAC_MEM_CLK_FORCE_ON_R {
42        GMAC_MEM_CLK_FORCE_ON_R::new(((self.bits >> 5) & 1) != 0)
43    }
44    #[doc = "Bit 6 - N/A"]
45    #[inline(always)]
46    pub fn gmac_rst_clk_tx_n(&self) -> GMAC_RST_CLK_TX_N_R {
47        GMAC_RST_CLK_TX_N_R::new(((self.bits >> 6) & 1) != 0)
48    }
49    #[doc = "Bit 7 - N/A"]
50    #[inline(always)]
51    pub fn gmac_rst_clk_rx_n(&self) -> GMAC_RST_CLK_RX_N_R {
52        GMAC_RST_CLK_RX_N_R::new(((self.bits >> 7) & 1) != 0)
53    }
54}
55#[cfg(feature = "impl-register-debug")]
56impl core::fmt::Debug for R {
57    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
58        f.debug_struct("GMAC_CTRL0")
59            .field("ptp_pps", &format_args!("{}", self.ptp_pps().bit()))
60            .field(
61                "sbd_flowctrl",
62                &format_args!("{}", self.sbd_flowctrl().bit()),
63            )
64            .field(
65                "phy_intf_sel",
66                &format_args!("{}", self.phy_intf_sel().bits()),
67            )
68            .field(
69                "gmac_mem_clk_force_on",
70                &format_args!("{}", self.gmac_mem_clk_force_on().bit()),
71            )
72            .field(
73                "gmac_rst_clk_tx_n",
74                &format_args!("{}", self.gmac_rst_clk_tx_n().bit()),
75            )
76            .field(
77                "gmac_rst_clk_rx_n",
78                &format_args!("{}", self.gmac_rst_clk_rx_n().bit()),
79            )
80            .finish()
81    }
82}
83#[cfg(feature = "impl-register-debug")]
84impl core::fmt::Debug for crate::generic::Reg<GMAC_CTRL0_SPEC> {
85    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
86        core::fmt::Debug::fmt(&self.read(), f)
87    }
88}
89impl W {
90    #[doc = "Bit 1 - N/A"]
91    #[inline(always)]
92    #[must_use]
93    pub fn sbd_flowctrl(&mut self) -> SBD_FLOWCTRL_W<GMAC_CTRL0_SPEC> {
94        SBD_FLOWCTRL_W::new(self, 1)
95    }
96    #[doc = "Bits 2:4 - N/A"]
97    #[inline(always)]
98    #[must_use]
99    pub fn phy_intf_sel(&mut self) -> PHY_INTF_SEL_W<GMAC_CTRL0_SPEC> {
100        PHY_INTF_SEL_W::new(self, 2)
101    }
102    #[doc = "Bit 5 - N/A"]
103    #[inline(always)]
104    #[must_use]
105    pub fn gmac_mem_clk_force_on(&mut self) -> GMAC_MEM_CLK_FORCE_ON_W<GMAC_CTRL0_SPEC> {
106        GMAC_MEM_CLK_FORCE_ON_W::new(self, 5)
107    }
108}
109#[doc = "N/A\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gmac_ctrl0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gmac_ctrl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
110pub struct GMAC_CTRL0_SPEC;
111impl crate::RegisterSpec for GMAC_CTRL0_SPEC {
112    type Ux = u32;
113}
114#[doc = "`read()` method returns [`gmac_ctrl0::R`](R) reader structure"]
115impl crate::Readable for GMAC_CTRL0_SPEC {}
116#[doc = "`write(|w| ..)` method takes [`gmac_ctrl0::W`](W) writer structure"]
117impl crate::Writable for GMAC_CTRL0_SPEC {
118    type Safety = crate::Unsafe;
119    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
120    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
121}
122#[doc = "`reset()` method sets GMAC_CTRL0 to value 0"]
123impl crate::Resettable for GMAC_CTRL0_SPEC {
124    const RESET_VALUE: u32 = 0;
125}
esp32p4/hp_sys/gmac_ctrl0.rs

esp32p4/hp_sys/
gmac_ctrl0.rs
