1#[doc = "Register `CTL0` reader"]
2pub type R = crate::R<CTL0_SPEC>;
3#[doc = "Register `CTL0` writer"]
4pub type W = crate::W<CTL0_SPEC>;
5#[doc = "Field `CH1_SMS` reader - NA"]
6pub type CH1_SMS_R = crate::BitReader;
7#[doc = "Field `CH1_SMS` writer - NA"]
8pub type CH1_SMS_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `CH1_DMS` reader - NA"]
10pub type CH1_DMS_R = crate::BitReader;
11#[doc = "Field `CH1_DMS` writer - NA"]
12pub type CH1_DMS_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `CH1_SINC` reader - NA"]
14pub type CH1_SINC_R = crate::BitReader;
15#[doc = "Field `CH1_SINC` writer - NA"]
16pub type CH1_SINC_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `CH1_DINC` reader - NA"]
18pub type CH1_DINC_R = crate::BitReader;
19#[doc = "Field `CH1_DINC` writer - NA"]
20pub type CH1_DINC_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `CH1_SRC_TR_WIDTH` reader - NA"]
22pub type CH1_SRC_TR_WIDTH_R = crate::FieldReader;
23#[doc = "Field `CH1_SRC_TR_WIDTH` writer - NA"]
24pub type CH1_SRC_TR_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
25#[doc = "Field `CH1_DST_TR_WIDTH` reader - NA"]
26pub type CH1_DST_TR_WIDTH_R = crate::FieldReader;
27#[doc = "Field `CH1_DST_TR_WIDTH` writer - NA"]
28pub type CH1_DST_TR_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
29#[doc = "Field `CH1_SRC_MSIZE` reader - NA"]
30pub type CH1_SRC_MSIZE_R = crate::FieldReader;
31#[doc = "Field `CH1_SRC_MSIZE` writer - NA"]
32pub type CH1_SRC_MSIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
33#[doc = "Field `CH1_DST_MSIZE` reader - NA"]
34pub type CH1_DST_MSIZE_R = crate::FieldReader;
35#[doc = "Field `CH1_DST_MSIZE` writer - NA"]
36pub type CH1_DST_MSIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
37#[doc = "Field `CH1_AR_CACHE` reader - NA"]
38pub type CH1_AR_CACHE_R = crate::FieldReader;
39#[doc = "Field `CH1_AR_CACHE` writer - NA"]
40pub type CH1_AR_CACHE_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
41#[doc = "Field `CH1_AW_CACHE` reader - NA"]
42pub type CH1_AW_CACHE_R = crate::FieldReader;
43#[doc = "Field `CH1_AW_CACHE` writer - NA"]
44pub type CH1_AW_CACHE_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
45#[doc = "Field `CH1_NONPOSTED_LASTWRITE_EN` reader - NA"]
46pub type CH1_NONPOSTED_LASTWRITE_EN_R = crate::BitReader;
47#[doc = "Field `CH1_NONPOSTED_LASTWRITE_EN` writer - NA"]
48pub type CH1_NONPOSTED_LASTWRITE_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
49impl R {
50 #[doc = "Bit 0 - NA"]
51 #[inline(always)]
52 pub fn ch1_sms(&self) -> CH1_SMS_R {
53 CH1_SMS_R::new((self.bits & 1) != 0)
54 }
55 #[doc = "Bit 2 - NA"]
56 #[inline(always)]
57 pub fn ch1_dms(&self) -> CH1_DMS_R {
58 CH1_DMS_R::new(((self.bits >> 2) & 1) != 0)
59 }
60 #[doc = "Bit 4 - NA"]
61 #[inline(always)]
62 pub fn ch1_sinc(&self) -> CH1_SINC_R {
63 CH1_SINC_R::new(((self.bits >> 4) & 1) != 0)
64 }
65 #[doc = "Bit 6 - NA"]
66 #[inline(always)]
67 pub fn ch1_dinc(&self) -> CH1_DINC_R {
68 CH1_DINC_R::new(((self.bits >> 6) & 1) != 0)
69 }
70 #[doc = "Bits 8:10 - NA"]
71 #[inline(always)]
72 pub fn ch1_src_tr_width(&self) -> CH1_SRC_TR_WIDTH_R {
73 CH1_SRC_TR_WIDTH_R::new(((self.bits >> 8) & 7) as u8)
74 }
75 #[doc = "Bits 11:13 - NA"]
76 #[inline(always)]
77 pub fn ch1_dst_tr_width(&self) -> CH1_DST_TR_WIDTH_R {
78 CH1_DST_TR_WIDTH_R::new(((self.bits >> 11) & 7) as u8)
79 }
80 #[doc = "Bits 14:17 - NA"]
81 #[inline(always)]
82 pub fn ch1_src_msize(&self) -> CH1_SRC_MSIZE_R {
83 CH1_SRC_MSIZE_R::new(((self.bits >> 14) & 0x0f) as u8)
84 }
85 #[doc = "Bits 18:21 - NA"]
86 #[inline(always)]
87 pub fn ch1_dst_msize(&self) -> CH1_DST_MSIZE_R {
88 CH1_DST_MSIZE_R::new(((self.bits >> 18) & 0x0f) as u8)
89 }
90 #[doc = "Bits 22:25 - NA"]
91 #[inline(always)]
92 pub fn ch1_ar_cache(&self) -> CH1_AR_CACHE_R {
93 CH1_AR_CACHE_R::new(((self.bits >> 22) & 0x0f) as u8)
94 }
95 #[doc = "Bits 26:29 - NA"]
96 #[inline(always)]
97 pub fn ch1_aw_cache(&self) -> CH1_AW_CACHE_R {
98 CH1_AW_CACHE_R::new(((self.bits >> 26) & 0x0f) as u8)
99 }
100 #[doc = "Bit 30 - NA"]
101 #[inline(always)]
102 pub fn ch1_nonposted_lastwrite_en(&self) -> CH1_NONPOSTED_LASTWRITE_EN_R {
103 CH1_NONPOSTED_LASTWRITE_EN_R::new(((self.bits >> 30) & 1) != 0)
104 }
105}
106#[cfg(feature = "impl-register-debug")]
107impl core::fmt::Debug for R {
108 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
109 f.debug_struct("CTL0")
110 .field("ch1_sms", &format_args!("{}", self.ch1_sms().bit()))
111 .field("ch1_dms", &format_args!("{}", self.ch1_dms().bit()))
112 .field("ch1_sinc", &format_args!("{}", self.ch1_sinc().bit()))
113 .field("ch1_dinc", &format_args!("{}", self.ch1_dinc().bit()))
114 .field(
115 "ch1_src_tr_width",
116 &format_args!("{}", self.ch1_src_tr_width().bits()),
117 )
118 .field(
119 "ch1_dst_tr_width",
120 &format_args!("{}", self.ch1_dst_tr_width().bits()),
121 )
122 .field(
123 "ch1_src_msize",
124 &format_args!("{}", self.ch1_src_msize().bits()),
125 )
126 .field(
127 "ch1_dst_msize",
128 &format_args!("{}", self.ch1_dst_msize().bits()),
129 )
130 .field(
131 "ch1_ar_cache",
132 &format_args!("{}", self.ch1_ar_cache().bits()),
133 )
134 .field(
135 "ch1_aw_cache",
136 &format_args!("{}", self.ch1_aw_cache().bits()),
137 )
138 .field(
139 "ch1_nonposted_lastwrite_en",
140 &format_args!("{}", self.ch1_nonposted_lastwrite_en().bit()),
141 )
142 .finish()
143 }
144}
145#[cfg(feature = "impl-register-debug")]
146impl core::fmt::Debug for crate::generic::Reg<CTL0_SPEC> {
147 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
148 core::fmt::Debug::fmt(&self.read(), f)
149 }
150}
151impl W {
152 #[doc = "Bit 0 - NA"]
153 #[inline(always)]
154 #[must_use]
155 pub fn ch1_sms(&mut self) -> CH1_SMS_W<CTL0_SPEC> {
156 CH1_SMS_W::new(self, 0)
157 }
158 #[doc = "Bit 2 - NA"]
159 #[inline(always)]
160 #[must_use]
161 pub fn ch1_dms(&mut self) -> CH1_DMS_W<CTL0_SPEC> {
162 CH1_DMS_W::new(self, 2)
163 }
164 #[doc = "Bit 4 - NA"]
165 #[inline(always)]
166 #[must_use]
167 pub fn ch1_sinc(&mut self) -> CH1_SINC_W<CTL0_SPEC> {
168 CH1_SINC_W::new(self, 4)
169 }
170 #[doc = "Bit 6 - NA"]
171 #[inline(always)]
172 #[must_use]
173 pub fn ch1_dinc(&mut self) -> CH1_DINC_W<CTL0_SPEC> {
174 CH1_DINC_W::new(self, 6)
175 }
176 #[doc = "Bits 8:10 - NA"]
177 #[inline(always)]
178 #[must_use]
179 pub fn ch1_src_tr_width(&mut self) -> CH1_SRC_TR_WIDTH_W<CTL0_SPEC> {
180 CH1_SRC_TR_WIDTH_W::new(self, 8)
181 }
182 #[doc = "Bits 11:13 - NA"]
183 #[inline(always)]
184 #[must_use]
185 pub fn ch1_dst_tr_width(&mut self) -> CH1_DST_TR_WIDTH_W<CTL0_SPEC> {
186 CH1_DST_TR_WIDTH_W::new(self, 11)
187 }
188 #[doc = "Bits 14:17 - NA"]
189 #[inline(always)]
190 #[must_use]
191 pub fn ch1_src_msize(&mut self) -> CH1_SRC_MSIZE_W<CTL0_SPEC> {
192 CH1_SRC_MSIZE_W::new(self, 14)
193 }
194 #[doc = "Bits 18:21 - NA"]
195 #[inline(always)]
196 #[must_use]
197 pub fn ch1_dst_msize(&mut self) -> CH1_DST_MSIZE_W<CTL0_SPEC> {
198 CH1_DST_MSIZE_W::new(self, 18)
199 }
200 #[doc = "Bits 22:25 - NA"]
201 #[inline(always)]
202 #[must_use]
203 pub fn ch1_ar_cache(&mut self) -> CH1_AR_CACHE_W<CTL0_SPEC> {
204 CH1_AR_CACHE_W::new(self, 22)
205 }
206 #[doc = "Bits 26:29 - NA"]
207 #[inline(always)]
208 #[must_use]
209 pub fn ch1_aw_cache(&mut self) -> CH1_AW_CACHE_W<CTL0_SPEC> {
210 CH1_AW_CACHE_W::new(self, 26)
211 }
212 #[doc = "Bit 30 - NA"]
213 #[inline(always)]
214 #[must_use]
215 pub fn ch1_nonposted_lastwrite_en(&mut self) -> CH1_NONPOSTED_LASTWRITE_EN_W<CTL0_SPEC> {
216 CH1_NONPOSTED_LASTWRITE_EN_W::new(self, 30)
217 }
218}
219#[doc = "NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctl0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
220pub struct CTL0_SPEC;
221impl crate::RegisterSpec for CTL0_SPEC {
222 type Ux = u32;
223}
224#[doc = "`read()` method returns [`ctl0::R`](R) reader structure"]
225impl crate::Readable for CTL0_SPEC {}
226#[doc = "`write(|w| ..)` method takes [`ctl0::W`](W) writer structure"]
227impl crate::Writable for CTL0_SPEC {
228 type Safety = crate::Unsafe;
229 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
230 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
231}
232#[doc = "`reset()` method sets CTL0 to value 0x1200"]
233impl crate::Resettable for CTL0_SPEC {
234 const RESET_VALUE: u32 = 0x1200;
235}