esp32p4/dma/
cfg0.rs

1#[doc = "Register `CFG0` reader"]
2pub type R = crate::R<CFG0_SPEC>;
3#[doc = "Register `CFG0` writer"]
4pub type W = crate::W<CFG0_SPEC>;
5#[doc = "Field `DMAC_EN` reader - NA"]
6pub type DMAC_EN_R = crate::BitReader;
7#[doc = "Field `DMAC_EN` writer - NA"]
8pub type DMAC_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `INT_EN` reader - NA"]
10pub type INT_EN_R = crate::BitReader;
11#[doc = "Field `INT_EN` writer - NA"]
12pub type INT_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
13impl R {
14    #[doc = "Bit 0 - NA"]
15    #[inline(always)]
16    pub fn dmac_en(&self) -> DMAC_EN_R {
17        DMAC_EN_R::new((self.bits & 1) != 0)
18    }
19    #[doc = "Bit 1 - NA"]
20    #[inline(always)]
21    pub fn int_en(&self) -> INT_EN_R {
22        INT_EN_R::new(((self.bits >> 1) & 1) != 0)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("CFG0")
29            .field("dmac_en", &format_args!("{}", self.dmac_en().bit()))
30            .field("int_en", &format_args!("{}", self.int_en().bit()))
31            .finish()
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for crate::generic::Reg<CFG0_SPEC> {
36    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
37        core::fmt::Debug::fmt(&self.read(), f)
38    }
39}
40impl W {
41    #[doc = "Bit 0 - NA"]
42    #[inline(always)]
43    #[must_use]
44    pub fn dmac_en(&mut self) -> DMAC_EN_W<CFG0_SPEC> {
45        DMAC_EN_W::new(self, 0)
46    }
47    #[doc = "Bit 1 - NA"]
48    #[inline(always)]
49    #[must_use]
50    pub fn int_en(&mut self) -> INT_EN_W<CFG0_SPEC> {
51        INT_EN_W::new(self, 1)
52    }
53}
54#[doc = "NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfg0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfg0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
55pub struct CFG0_SPEC;
56impl crate::RegisterSpec for CFG0_SPEC {
57    type Ux = u32;
58}
59#[doc = "`read()` method returns [`cfg0::R`](R) reader structure"]
60impl crate::Readable for CFG0_SPEC {}
61#[doc = "`write(|w| ..)` method takes [`cfg0::W`](W) writer structure"]
62impl crate::Writable for CFG0_SPEC {
63    type Safety = crate::Unsafe;
64    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
65    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
66}
67#[doc = "`reset()` method sets CFG0 to value 0"]
68impl crate::Resettable for CFG0_SPEC {
69    const RESET_VALUE: u32 = 0;
70}
esp32p4/dma/cfg0.rs

esp32p4/dma/
cfg0.rs
