esp32p4/bitscrambler/
tx_inst_cfg0.rs

1#[doc = "Register `TX_INST_CFG0` reader"]
2pub type R = crate::R<TX_INST_CFG0_SPEC>;
3#[doc = "Register `TX_INST_CFG0` writer"]
4pub type W = crate::W<TX_INST_CFG0_SPEC>;
5#[doc = "Field `TX_INST_IDX` reader - write this bits to specify the one of 8 instruction"]
6pub type TX_INST_IDX_R = crate::FieldReader;
7#[doc = "Field `TX_INST_IDX` writer - write this bits to specify the one of 8 instruction"]
8pub type TX_INST_IDX_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
9#[doc = "Field `TX_INST_POS` reader - write this bits to specify the bit position of 257 bit instruction which in units of 32 bits"]
10pub type TX_INST_POS_R = crate::FieldReader;
11#[doc = "Field `TX_INST_POS` writer - write this bits to specify the bit position of 257 bit instruction which in units of 32 bits"]
12pub type TX_INST_POS_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
13impl R {
14    #[doc = "Bits 0:2 - write this bits to specify the one of 8 instruction"]
15    #[inline(always)]
16    pub fn tx_inst_idx(&self) -> TX_INST_IDX_R {
17        TX_INST_IDX_R::new((self.bits & 7) as u8)
18    }
19    #[doc = "Bits 3:6 - write this bits to specify the bit position of 257 bit instruction which in units of 32 bits"]
20    #[inline(always)]
21    pub fn tx_inst_pos(&self) -> TX_INST_POS_R {
22        TX_INST_POS_R::new(((self.bits >> 3) & 0x0f) as u8)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("TX_INST_CFG0")
29            .field(
30                "tx_inst_idx",
31                &format_args!("{}", self.tx_inst_idx().bits()),
32            )
33            .field(
34                "tx_inst_pos",
35                &format_args!("{}", self.tx_inst_pos().bits()),
36            )
37            .finish()
38    }
39}
40#[cfg(feature = "impl-register-debug")]
41impl core::fmt::Debug for crate::generic::Reg<TX_INST_CFG0_SPEC> {
42    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
43        core::fmt::Debug::fmt(&self.read(), f)
44    }
45}
46impl W {
47    #[doc = "Bits 0:2 - write this bits to specify the one of 8 instruction"]
48    #[inline(always)]
49    #[must_use]
50    pub fn tx_inst_idx(&mut self) -> TX_INST_IDX_W<TX_INST_CFG0_SPEC> {
51        TX_INST_IDX_W::new(self, 0)
52    }
53    #[doc = "Bits 3:6 - write this bits to specify the bit position of 257 bit instruction which in units of 32 bits"]
54    #[inline(always)]
55    #[must_use]
56    pub fn tx_inst_pos(&mut self) -> TX_INST_POS_W<TX_INST_CFG0_SPEC> {
57        TX_INST_POS_W::new(self, 3)
58    }
59}
60#[doc = "Control and configuration registers\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_inst_cfg0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tx_inst_cfg0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
61pub struct TX_INST_CFG0_SPEC;
62impl crate::RegisterSpec for TX_INST_CFG0_SPEC {
63    type Ux = u32;
64}
65#[doc = "`read()` method returns [`tx_inst_cfg0::R`](R) reader structure"]
66impl crate::Readable for TX_INST_CFG0_SPEC {}
67#[doc = "`write(|w| ..)` method takes [`tx_inst_cfg0::W`](W) writer structure"]
68impl crate::Writable for TX_INST_CFG0_SPEC {
69    type Safety = crate::Unsafe;
70    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
71    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
72}
73#[doc = "`reset()` method sets TX_INST_CFG0 to value 0"]
74impl crate::Resettable for TX_INST_CFG0_SPEC {
75    const RESET_VALUE: u32 = 0;
76}
esp32p4/bitscrambler/tx_inst_cfg0.rs

esp32p4/bitscrambler/
tx_inst_cfg0.rs
