esp32p4/uart0/
hwfc_conf.rs1#[doc = "Register `HWFC_CONF` reader"]
2pub type R = crate::R<HWFC_CONF_SPEC>;
3#[doc = "Register `HWFC_CONF` writer"]
4pub type W = crate::W<HWFC_CONF_SPEC>;
5#[doc = "Field `RX_FLOW_THRHD` reader - This register is used to configure the maximum amount of data that can be received when hardware flow control works."]
6pub type RX_FLOW_THRHD_R = crate::FieldReader;
7#[doc = "Field `RX_FLOW_THRHD` writer - This register is used to configure the maximum amount of data that can be received when hardware flow control works."]
8pub type RX_FLOW_THRHD_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `RX_FLOW_EN` reader - This is the flow enable bit for UART receiver."]
10pub type RX_FLOW_EN_R = crate::BitReader;
11#[doc = "Field `RX_FLOW_EN` writer - This is the flow enable bit for UART receiver."]
12pub type RX_FLOW_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
13impl R {
14 #[doc = "Bits 0:7 - This register is used to configure the maximum amount of data that can be received when hardware flow control works."]
15 #[inline(always)]
16 pub fn rx_flow_thrhd(&self) -> RX_FLOW_THRHD_R {
17 RX_FLOW_THRHD_R::new((self.bits & 0xff) as u8)
18 }
19 #[doc = "Bit 8 - This is the flow enable bit for UART receiver."]
20 #[inline(always)]
21 pub fn rx_flow_en(&self) -> RX_FLOW_EN_R {
22 RX_FLOW_EN_R::new(((self.bits >> 8) & 1) != 0)
23 }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28 f.debug_struct("HWFC_CONF")
29 .field(
30 "rx_flow_thrhd",
31 &format_args!("{}", self.rx_flow_thrhd().bits()),
32 )
33 .field("rx_flow_en", &format_args!("{}", self.rx_flow_en().bit()))
34 .finish()
35 }
36}
37#[cfg(feature = "impl-register-debug")]
38impl core::fmt::Debug for crate::generic::Reg<HWFC_CONF_SPEC> {
39 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
40 core::fmt::Debug::fmt(&self.read(), f)
41 }
42}
43impl W {
44 #[doc = "Bits 0:7 - This register is used to configure the maximum amount of data that can be received when hardware flow control works."]
45 #[inline(always)]
46 #[must_use]
47 pub fn rx_flow_thrhd(&mut self) -> RX_FLOW_THRHD_W<HWFC_CONF_SPEC> {
48 RX_FLOW_THRHD_W::new(self, 0)
49 }
50 #[doc = "Bit 8 - This is the flow enable bit for UART receiver."]
51 #[inline(always)]
52 #[must_use]
53 pub fn rx_flow_en(&mut self) -> RX_FLOW_EN_W<HWFC_CONF_SPEC> {
54 RX_FLOW_EN_W::new(self, 8)
55 }
56}
57#[doc = "Hardware flow-control configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwfc_conf::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwfc_conf::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
58pub struct HWFC_CONF_SPEC;
59impl crate::RegisterSpec for HWFC_CONF_SPEC {
60 type Ux = u32;
61}
62#[doc = "`read()` method returns [`hwfc_conf::R`](R) reader structure"]
63impl crate::Readable for HWFC_CONF_SPEC {}
64#[doc = "`write(|w| ..)` method takes [`hwfc_conf::W`](W) writer structure"]
65impl crate::Writable for HWFC_CONF_SPEC {
66 type Safety = crate::Unsafe;
67 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
68 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
69}
70#[doc = "`reset()` method sets HWFC_CONF to value 0"]
71impl crate::Resettable for HWFC_CONF_SPEC {
72 const RESET_VALUE: u32 = 0;
73}