esp32p4/twai0/
bus_timing_0.rs

1#[doc = "Register `BUS_TIMING_0` reader"]
2pub type R = crate::R<BUS_TIMING_0_SPEC>;
3#[doc = "Register `BUS_TIMING_0` writer"]
4pub type W = crate::W<BUS_TIMING_0_SPEC>;
5#[doc = "Field `BAUD_PRESC` reader - The period of the TWAI system clock is programmable and determines the individual bit timing. Software has R/W permission in reset mode and RO permission in operation mode."]
6pub type BAUD_PRESC_R = crate::FieldReader<u16>;
7#[doc = "Field `BAUD_PRESC` writer - The period of the TWAI system clock is programmable and determines the individual bit timing. Software has R/W permission in reset mode and RO permission in operation mode."]
8pub type BAUD_PRESC_W<'a, REG> = crate::FieldWriter<'a, REG, 14, u16>;
9#[doc = "Field `SYNC_JUMP_WIDTH` reader - The synchronization jump width defines the maximum number of clock cycles a bit period may be shortened or lengthened. Software has R/W permission in reset mode and RO in operation mode."]
10pub type SYNC_JUMP_WIDTH_R = crate::FieldReader;
11#[doc = "Field `SYNC_JUMP_WIDTH` writer - The synchronization jump width defines the maximum number of clock cycles a bit period may be shortened or lengthened. Software has R/W permission in reset mode and RO in operation mode."]
12pub type SYNC_JUMP_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
13impl R {
14    #[doc = "Bits 0:13 - The period of the TWAI system clock is programmable and determines the individual bit timing. Software has R/W permission in reset mode and RO permission in operation mode."]
15    #[inline(always)]
16    pub fn baud_presc(&self) -> BAUD_PRESC_R {
17        BAUD_PRESC_R::new((self.bits & 0x3fff) as u16)
18    }
19    #[doc = "Bits 14:15 - The synchronization jump width defines the maximum number of clock cycles a bit period may be shortened or lengthened. Software has R/W permission in reset mode and RO in operation mode."]
20    #[inline(always)]
21    pub fn sync_jump_width(&self) -> SYNC_JUMP_WIDTH_R {
22        SYNC_JUMP_WIDTH_R::new(((self.bits >> 14) & 3) as u8)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("BUS_TIMING_0")
29            .field("baud_presc", &format_args!("{}", self.baud_presc().bits()))
30            .field(
31                "sync_jump_width",
32                &format_args!("{}", self.sync_jump_width().bits()),
33            )
34            .finish()
35    }
36}
37#[cfg(feature = "impl-register-debug")]
38impl core::fmt::Debug for crate::generic::Reg<BUS_TIMING_0_SPEC> {
39    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
40        core::fmt::Debug::fmt(&self.read(), f)
41    }
42}
43impl W {
44    #[doc = "Bits 0:13 - The period of the TWAI system clock is programmable and determines the individual bit timing. Software has R/W permission in reset mode and RO permission in operation mode."]
45    #[inline(always)]
46    #[must_use]
47    pub fn baud_presc(&mut self) -> BAUD_PRESC_W<BUS_TIMING_0_SPEC> {
48        BAUD_PRESC_W::new(self, 0)
49    }
50    #[doc = "Bits 14:15 - The synchronization jump width defines the maximum number of clock cycles a bit period may be shortened or lengthened. Software has R/W permission in reset mode and RO in operation mode."]
51    #[inline(always)]
52    #[must_use]
53    pub fn sync_jump_width(&mut self) -> SYNC_JUMP_WIDTH_W<BUS_TIMING_0_SPEC> {
54        SYNC_JUMP_WIDTH_W::new(self, 14)
55    }
56}
57#[doc = "Bit timing configuration register 0.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bus_timing_0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bus_timing_0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
58pub struct BUS_TIMING_0_SPEC;
59impl crate::RegisterSpec for BUS_TIMING_0_SPEC {
60    type Ux = u32;
61}
62#[doc = "`read()` method returns [`bus_timing_0::R`](R) reader structure"]
63impl crate::Readable for BUS_TIMING_0_SPEC {}
64#[doc = "`write(|w| ..)` method takes [`bus_timing_0::W`](W) writer structure"]
65impl crate::Writable for BUS_TIMING_0_SPEC {
66    type Safety = crate::Unsafe;
67    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
68    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
69}
70#[doc = "`reset()` method sets BUS_TIMING_0 to value 0"]
71impl crate::Resettable for BUS_TIMING_0_SPEC {
72    const RESET_VALUE: u32 = 0;
73}
esp32p4/twai0/bus_timing_0.rs

esp32p4/twai0/
bus_timing_0.rs
