esp32p4/timg0/
rtccalicfg.rs

1#[doc = "Register `RTCCALICFG` reader"]
2pub type R = crate::R<RTCCALICFG_SPEC>;
3#[doc = "Register `RTCCALICFG` writer"]
4pub type W = crate::W<RTCCALICFG_SPEC>;
5#[doc = "Field `RTC_CALI_START_CYCLING` reader - 0: one-shot frequency calculation,1: periodic frequency calculation,"]
6pub type RTC_CALI_START_CYCLING_R = crate::BitReader;
7#[doc = "Field `RTC_CALI_START_CYCLING` writer - 0: one-shot frequency calculation,1: periodic frequency calculation,"]
8pub type RTC_CALI_START_CYCLING_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `RTC_CALI_CLK_SEL` reader - 0:rtc slow clock. 1:clk_8m, 2:xtal_32k."]
10pub type RTC_CALI_CLK_SEL_R = crate::FieldReader;
11#[doc = "Field `RTC_CALI_CLK_SEL` writer - 0:rtc slow clock. 1:clk_8m, 2:xtal_32k."]
12pub type RTC_CALI_CLK_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
13#[doc = "Field `RTC_CALI_RDY` reader - indicate one-shot frequency calculation is done."]
14pub type RTC_CALI_RDY_R = crate::BitReader;
15#[doc = "Field `RTC_CALI_MAX` reader - Configure the time to calculate RTC slow clock's frequency."]
16pub type RTC_CALI_MAX_R = crate::FieldReader<u16>;
17#[doc = "Field `RTC_CALI_MAX` writer - Configure the time to calculate RTC slow clock's frequency."]
18pub type RTC_CALI_MAX_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>;
19#[doc = "Field `RTC_CALI_START` reader - Set this bit to start one-shot frequency calculation."]
20pub type RTC_CALI_START_R = crate::BitReader;
21#[doc = "Field `RTC_CALI_START` writer - Set this bit to start one-shot frequency calculation."]
22pub type RTC_CALI_START_W<'a, REG> = crate::BitWriter<'a, REG>;
23impl R {
24    #[doc = "Bit 12 - 0: one-shot frequency calculation,1: periodic frequency calculation,"]
25    #[inline(always)]
26    pub fn rtc_cali_start_cycling(&self) -> RTC_CALI_START_CYCLING_R {
27        RTC_CALI_START_CYCLING_R::new(((self.bits >> 12) & 1) != 0)
28    }
29    #[doc = "Bits 13:14 - 0:rtc slow clock. 1:clk_8m, 2:xtal_32k."]
30    #[inline(always)]
31    pub fn rtc_cali_clk_sel(&self) -> RTC_CALI_CLK_SEL_R {
32        RTC_CALI_CLK_SEL_R::new(((self.bits >> 13) & 3) as u8)
33    }
34    #[doc = "Bit 15 - indicate one-shot frequency calculation is done."]
35    #[inline(always)]
36    pub fn rtc_cali_rdy(&self) -> RTC_CALI_RDY_R {
37        RTC_CALI_RDY_R::new(((self.bits >> 15) & 1) != 0)
38    }
39    #[doc = "Bits 16:30 - Configure the time to calculate RTC slow clock's frequency."]
40    #[inline(always)]
41    pub fn rtc_cali_max(&self) -> RTC_CALI_MAX_R {
42        RTC_CALI_MAX_R::new(((self.bits >> 16) & 0x7fff) as u16)
43    }
44    #[doc = "Bit 31 - Set this bit to start one-shot frequency calculation."]
45    #[inline(always)]
46    pub fn rtc_cali_start(&self) -> RTC_CALI_START_R {
47        RTC_CALI_START_R::new(((self.bits >> 31) & 1) != 0)
48    }
49}
50#[cfg(feature = "impl-register-debug")]
51impl core::fmt::Debug for R {
52    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
53        f.debug_struct("RTCCALICFG")
54            .field(
55                "rtc_cali_start_cycling",
56                &format_args!("{}", self.rtc_cali_start_cycling().bit()),
57            )
58            .field(
59                "rtc_cali_clk_sel",
60                &format_args!("{}", self.rtc_cali_clk_sel().bits()),
61            )
62            .field(
63                "rtc_cali_rdy",
64                &format_args!("{}", self.rtc_cali_rdy().bit()),
65            )
66            .field(
67                "rtc_cali_max",
68                &format_args!("{}", self.rtc_cali_max().bits()),
69            )
70            .field(
71                "rtc_cali_start",
72                &format_args!("{}", self.rtc_cali_start().bit()),
73            )
74            .finish()
75    }
76}
77#[cfg(feature = "impl-register-debug")]
78impl core::fmt::Debug for crate::generic::Reg<RTCCALICFG_SPEC> {
79    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
80        core::fmt::Debug::fmt(&self.read(), f)
81    }
82}
83impl W {
84    #[doc = "Bit 12 - 0: one-shot frequency calculation,1: periodic frequency calculation,"]
85    #[inline(always)]
86    #[must_use]
87    pub fn rtc_cali_start_cycling(&mut self) -> RTC_CALI_START_CYCLING_W<RTCCALICFG_SPEC> {
88        RTC_CALI_START_CYCLING_W::new(self, 12)
89    }
90    #[doc = "Bits 13:14 - 0:rtc slow clock. 1:clk_8m, 2:xtal_32k."]
91    #[inline(always)]
92    #[must_use]
93    pub fn rtc_cali_clk_sel(&mut self) -> RTC_CALI_CLK_SEL_W<RTCCALICFG_SPEC> {
94        RTC_CALI_CLK_SEL_W::new(self, 13)
95    }
96    #[doc = "Bits 16:30 - Configure the time to calculate RTC slow clock's frequency."]
97    #[inline(always)]
98    #[must_use]
99    pub fn rtc_cali_max(&mut self) -> RTC_CALI_MAX_W<RTCCALICFG_SPEC> {
100        RTC_CALI_MAX_W::new(self, 16)
101    }
102    #[doc = "Bit 31 - Set this bit to start one-shot frequency calculation."]
103    #[inline(always)]
104    #[must_use]
105    pub fn rtc_cali_start(&mut self) -> RTC_CALI_START_W<RTCCALICFG_SPEC> {
106        RTC_CALI_START_W::new(self, 31)
107    }
108}
109#[doc = "RTC calibration configure register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rtccalicfg::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rtccalicfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
110pub struct RTCCALICFG_SPEC;
111impl crate::RegisterSpec for RTCCALICFG_SPEC {
112    type Ux = u32;
113}
114#[doc = "`read()` method returns [`rtccalicfg::R`](R) reader structure"]
115impl crate::Readable for RTCCALICFG_SPEC {}
116#[doc = "`write(|w| ..)` method takes [`rtccalicfg::W`](W) writer structure"]
117impl crate::Writable for RTCCALICFG_SPEC {
118    type Safety = crate::Unsafe;
119    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
120    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
121}
122#[doc = "`reset()` method sets RTCCALICFG to value 0x0001_1000"]
123impl crate::Resettable for RTCCALICFG_SPEC {
124    const RESET_VALUE: u32 = 0x0001_1000;
125}
esp32p4/timg0/rtccalicfg.rs

esp32p4/timg0/
rtccalicfg.rs
