esp32p4/spi3/
dma_int_set.rs1#[doc = "Register `DMA_INT_SET` writer"]
2pub type W = crate::W<DMA_INT_SET_SPEC>;
3#[doc = "Field `DMA_INFIFO_FULL_ERR_INT_SET` writer - The software set bit for SPI_DMA_INFIFO_FULL_ERR_INT interrupt."]
4pub type DMA_INFIFO_FULL_ERR_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
5#[doc = "Field `DMA_OUTFIFO_EMPTY_ERR_INT_SET` writer - The software set bit for SPI_DMA_OUTFIFO_EMPTY_ERR_INT interrupt."]
6pub type DMA_OUTFIFO_EMPTY_ERR_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
7#[doc = "Field `SLV_EX_QPI_INT_SET` writer - The software set bit for SPI slave Ex_QPI interrupt."]
8pub type SLV_EX_QPI_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `SLV_EN_QPI_INT_SET` writer - The software set bit for SPI slave En_QPI interrupt."]
10pub type SLV_EN_QPI_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
11#[doc = "Field `SLV_CMD7_INT_SET` writer - The software set bit for SPI slave CMD7 interrupt."]
12pub type SLV_CMD7_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `SLV_CMD8_INT_SET` writer - The software set bit for SPI slave CMD8 interrupt."]
14pub type SLV_CMD8_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
15#[doc = "Field `SLV_CMD9_INT_SET` writer - The software set bit for SPI slave CMD9 interrupt."]
16pub type SLV_CMD9_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `SLV_CMDA_INT_SET` writer - The software set bit for SPI slave CMDA interrupt."]
18pub type SLV_CMDA_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
19#[doc = "Field `SLV_RD_DMA_DONE_INT_SET` writer - The software set bit for SPI_SLV_RD_DMA_DONE_INT interrupt."]
20pub type SLV_RD_DMA_DONE_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `SLV_WR_DMA_DONE_INT_SET` writer - The software set bit for SPI_SLV_WR_DMA_DONE_INT interrupt."]
22pub type SLV_WR_DMA_DONE_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
23#[doc = "Field `SLV_RD_BUF_DONE_INT_SET` writer - The software set bit for SPI_SLV_RD_BUF_DONE_INT interrupt."]
24pub type SLV_RD_BUF_DONE_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `SLV_WR_BUF_DONE_INT_SET` writer - The software set bit for SPI_SLV_WR_BUF_DONE_INT interrupt."]
26pub type SLV_WR_BUF_DONE_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
27#[doc = "Field `TRANS_DONE_INT_SET` writer - The software set bit for SPI_TRANS_DONE_INT interrupt."]
28pub type TRANS_DONE_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `DMA_SEG_TRANS_DONE_INT_SET` writer - The software set bit for SPI_DMA_SEG_TRANS_DONE_INT interrupt."]
30pub type DMA_SEG_TRANS_DONE_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
31#[doc = "Field `SLV_BUF_ADDR_ERR_INT_SET` writer - The software set bit for SPI_SLV_BUF_ADDR_ERR_INT interrupt."]
32pub type SLV_BUF_ADDR_ERR_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `SLV_CMD_ERR_INT_SET` writer - The software set bit for SPI_SLV_CMD_ERR_INT interrupt."]
34pub type SLV_CMD_ERR_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
35#[doc = "Field `MST_RX_AFIFO_WFULL_ERR_INT_SET` writer - The software set bit for SPI_MST_RX_AFIFO_WFULL_ERR_INT interrupt."]
36pub type MST_RX_AFIFO_WFULL_ERR_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `MST_TX_AFIFO_REMPTY_ERR_INT_SET` writer - The software set bit for SPI_MST_TX_AFIFO_REMPTY_ERR_INT interrupt."]
38pub type MST_TX_AFIFO_REMPTY_ERR_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
39#[doc = "Field `APP2_INT_SET` writer - The software set bit for SPI_APP2_INT interrupt."]
40pub type APP2_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `APP1_INT_SET` writer - The software set bit for SPI_APP1_INT interrupt."]
42pub type APP1_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
43#[cfg(feature = "impl-register-debug")]
44impl core::fmt::Debug for crate::generic::Reg<DMA_INT_SET_SPEC> {
45 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
46 write!(f, "(not readable)")
47 }
48}
49impl W {
50 #[doc = "Bit 0 - The software set bit for SPI_DMA_INFIFO_FULL_ERR_INT interrupt."]
51 #[inline(always)]
52 #[must_use]
53 pub fn dma_infifo_full_err_int_set(
54 &mut self,
55 ) -> DMA_INFIFO_FULL_ERR_INT_SET_W<DMA_INT_SET_SPEC> {
56 DMA_INFIFO_FULL_ERR_INT_SET_W::new(self, 0)
57 }
58 #[doc = "Bit 1 - The software set bit for SPI_DMA_OUTFIFO_EMPTY_ERR_INT interrupt."]
59 #[inline(always)]
60 #[must_use]
61 pub fn dma_outfifo_empty_err_int_set(
62 &mut self,
63 ) -> DMA_OUTFIFO_EMPTY_ERR_INT_SET_W<DMA_INT_SET_SPEC> {
64 DMA_OUTFIFO_EMPTY_ERR_INT_SET_W::new(self, 1)
65 }
66 #[doc = "Bit 2 - The software set bit for SPI slave Ex_QPI interrupt."]
67 #[inline(always)]
68 #[must_use]
69 pub fn slv_ex_qpi_int_set(&mut self) -> SLV_EX_QPI_INT_SET_W<DMA_INT_SET_SPEC> {
70 SLV_EX_QPI_INT_SET_W::new(self, 2)
71 }
72 #[doc = "Bit 3 - The software set bit for SPI slave En_QPI interrupt."]
73 #[inline(always)]
74 #[must_use]
75 pub fn slv_en_qpi_int_set(&mut self) -> SLV_EN_QPI_INT_SET_W<DMA_INT_SET_SPEC> {
76 SLV_EN_QPI_INT_SET_W::new(self, 3)
77 }
78 #[doc = "Bit 4 - The software set bit for SPI slave CMD7 interrupt."]
79 #[inline(always)]
80 #[must_use]
81 pub fn slv_cmd7_int_set(&mut self) -> SLV_CMD7_INT_SET_W<DMA_INT_SET_SPEC> {
82 SLV_CMD7_INT_SET_W::new(self, 4)
83 }
84 #[doc = "Bit 5 - The software set bit for SPI slave CMD8 interrupt."]
85 #[inline(always)]
86 #[must_use]
87 pub fn slv_cmd8_int_set(&mut self) -> SLV_CMD8_INT_SET_W<DMA_INT_SET_SPEC> {
88 SLV_CMD8_INT_SET_W::new(self, 5)
89 }
90 #[doc = "Bit 6 - The software set bit for SPI slave CMD9 interrupt."]
91 #[inline(always)]
92 #[must_use]
93 pub fn slv_cmd9_int_set(&mut self) -> SLV_CMD9_INT_SET_W<DMA_INT_SET_SPEC> {
94 SLV_CMD9_INT_SET_W::new(self, 6)
95 }
96 #[doc = "Bit 7 - The software set bit for SPI slave CMDA interrupt."]
97 #[inline(always)]
98 #[must_use]
99 pub fn slv_cmda_int_set(&mut self) -> SLV_CMDA_INT_SET_W<DMA_INT_SET_SPEC> {
100 SLV_CMDA_INT_SET_W::new(self, 7)
101 }
102 #[doc = "Bit 8 - The software set bit for SPI_SLV_RD_DMA_DONE_INT interrupt."]
103 #[inline(always)]
104 #[must_use]
105 pub fn slv_rd_dma_done_int_set(&mut self) -> SLV_RD_DMA_DONE_INT_SET_W<DMA_INT_SET_SPEC> {
106 SLV_RD_DMA_DONE_INT_SET_W::new(self, 8)
107 }
108 #[doc = "Bit 9 - The software set bit for SPI_SLV_WR_DMA_DONE_INT interrupt."]
109 #[inline(always)]
110 #[must_use]
111 pub fn slv_wr_dma_done_int_set(&mut self) -> SLV_WR_DMA_DONE_INT_SET_W<DMA_INT_SET_SPEC> {
112 SLV_WR_DMA_DONE_INT_SET_W::new(self, 9)
113 }
114 #[doc = "Bit 10 - The software set bit for SPI_SLV_RD_BUF_DONE_INT interrupt."]
115 #[inline(always)]
116 #[must_use]
117 pub fn slv_rd_buf_done_int_set(&mut self) -> SLV_RD_BUF_DONE_INT_SET_W<DMA_INT_SET_SPEC> {
118 SLV_RD_BUF_DONE_INT_SET_W::new(self, 10)
119 }
120 #[doc = "Bit 11 - The software set bit for SPI_SLV_WR_BUF_DONE_INT interrupt."]
121 #[inline(always)]
122 #[must_use]
123 pub fn slv_wr_buf_done_int_set(&mut self) -> SLV_WR_BUF_DONE_INT_SET_W<DMA_INT_SET_SPEC> {
124 SLV_WR_BUF_DONE_INT_SET_W::new(self, 11)
125 }
126 #[doc = "Bit 12 - The software set bit for SPI_TRANS_DONE_INT interrupt."]
127 #[inline(always)]
128 #[must_use]
129 pub fn trans_done_int_set(&mut self) -> TRANS_DONE_INT_SET_W<DMA_INT_SET_SPEC> {
130 TRANS_DONE_INT_SET_W::new(self, 12)
131 }
132 #[doc = "Bit 13 - The software set bit for SPI_DMA_SEG_TRANS_DONE_INT interrupt."]
133 #[inline(always)]
134 #[must_use]
135 pub fn dma_seg_trans_done_int_set(&mut self) -> DMA_SEG_TRANS_DONE_INT_SET_W<DMA_INT_SET_SPEC> {
136 DMA_SEG_TRANS_DONE_INT_SET_W::new(self, 13)
137 }
138 #[doc = "Bit 15 - The software set bit for SPI_SLV_BUF_ADDR_ERR_INT interrupt."]
139 #[inline(always)]
140 #[must_use]
141 pub fn slv_buf_addr_err_int_set(&mut self) -> SLV_BUF_ADDR_ERR_INT_SET_W<DMA_INT_SET_SPEC> {
142 SLV_BUF_ADDR_ERR_INT_SET_W::new(self, 15)
143 }
144 #[doc = "Bit 16 - The software set bit for SPI_SLV_CMD_ERR_INT interrupt."]
145 #[inline(always)]
146 #[must_use]
147 pub fn slv_cmd_err_int_set(&mut self) -> SLV_CMD_ERR_INT_SET_W<DMA_INT_SET_SPEC> {
148 SLV_CMD_ERR_INT_SET_W::new(self, 16)
149 }
150 #[doc = "Bit 17 - The software set bit for SPI_MST_RX_AFIFO_WFULL_ERR_INT interrupt."]
151 #[inline(always)]
152 #[must_use]
153 pub fn mst_rx_afifo_wfull_err_int_set(
154 &mut self,
155 ) -> MST_RX_AFIFO_WFULL_ERR_INT_SET_W<DMA_INT_SET_SPEC> {
156 MST_RX_AFIFO_WFULL_ERR_INT_SET_W::new(self, 17)
157 }
158 #[doc = "Bit 18 - The software set bit for SPI_MST_TX_AFIFO_REMPTY_ERR_INT interrupt."]
159 #[inline(always)]
160 #[must_use]
161 pub fn mst_tx_afifo_rempty_err_int_set(
162 &mut self,
163 ) -> MST_TX_AFIFO_REMPTY_ERR_INT_SET_W<DMA_INT_SET_SPEC> {
164 MST_TX_AFIFO_REMPTY_ERR_INT_SET_W::new(self, 18)
165 }
166 #[doc = "Bit 19 - The software set bit for SPI_APP2_INT interrupt."]
167 #[inline(always)]
168 #[must_use]
169 pub fn app2_int_set(&mut self) -> APP2_INT_SET_W<DMA_INT_SET_SPEC> {
170 APP2_INT_SET_W::new(self, 19)
171 }
172 #[doc = "Bit 20 - The software set bit for SPI_APP1_INT interrupt."]
173 #[inline(always)]
174 #[must_use]
175 pub fn app1_int_set(&mut self) -> APP1_INT_SET_W<DMA_INT_SET_SPEC> {
176 APP1_INT_SET_W::new(self, 20)
177 }
178}
179#[doc = "SPI interrupt software set register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_int_set::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
180pub struct DMA_INT_SET_SPEC;
181impl crate::RegisterSpec for DMA_INT_SET_SPEC {
182 type Ux = u32;
183}
184#[doc = "`write(|w| ..)` method takes [`dma_int_set::W`](W) writer structure"]
185impl crate::Writable for DMA_INT_SET_SPEC {
186 type Safety = crate::Unsafe;
187 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
188 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
189}
190#[doc = "`reset()` method sets DMA_INT_SET to value 0"]
191impl crate::Resettable for DMA_INT_SET_SPEC {
192 const RESET_VALUE: u32 = 0;
193}