esp32p4/rmt/
tx_chstatus.rs

1#[doc = "Register `TX_CH%sSTATUS` reader"]
2pub type R = crate::R<TX_CHSTATUS_SPEC>;
3#[doc = "Field `MEM_RADDR_EX_CH0` reader - This register records the memory address offset when transmitter of CHANNEL%s is using the RAM."]
4pub type MEM_RADDR_EX_CH0_R = crate::FieldReader<u16>;
5#[doc = "Field `APB_MEM_WADDR_CH0` reader - This register records the memory address offset when writes RAM over APB bus."]
6pub type APB_MEM_WADDR_CH0_R = crate::FieldReader<u16>;
7#[doc = "Field `STATE_CH0` reader - This register records the FSM status of CHANNEL%s."]
8pub type STATE_CH0_R = crate::FieldReader;
9#[doc = "Field `MEM_EMPTY_CH0` reader - This status bit will be set when the data to be set is more than memory size and the wraparound mode is disabled."]
10pub type MEM_EMPTY_CH0_R = crate::BitReader;
11#[doc = "Field `APB_MEM_WR_ERR_CH0` reader - This status bit will be set if the offset address out of memory size when writes via APB bus."]
12pub type APB_MEM_WR_ERR_CH0_R = crate::BitReader;
13impl R {
14    #[doc = "Bits 0:9 - This register records the memory address offset when transmitter of CHANNEL%s is using the RAM."]
15    #[inline(always)]
16    pub fn mem_raddr_ex_ch0(&self) -> MEM_RADDR_EX_CH0_R {
17        MEM_RADDR_EX_CH0_R::new((self.bits & 0x03ff) as u16)
18    }
19    #[doc = "Bits 11:20 - This register records the memory address offset when writes RAM over APB bus."]
20    #[inline(always)]
21    pub fn apb_mem_waddr_ch0(&self) -> APB_MEM_WADDR_CH0_R {
22        APB_MEM_WADDR_CH0_R::new(((self.bits >> 11) & 0x03ff) as u16)
23    }
24    #[doc = "Bits 22:24 - This register records the FSM status of CHANNEL%s."]
25    #[inline(always)]
26    pub fn state_ch0(&self) -> STATE_CH0_R {
27        STATE_CH0_R::new(((self.bits >> 22) & 7) as u8)
28    }
29    #[doc = "Bit 25 - This status bit will be set when the data to be set is more than memory size and the wraparound mode is disabled."]
30    #[inline(always)]
31    pub fn mem_empty_ch0(&self) -> MEM_EMPTY_CH0_R {
32        MEM_EMPTY_CH0_R::new(((self.bits >> 25) & 1) != 0)
33    }
34    #[doc = "Bit 26 - This status bit will be set if the offset address out of memory size when writes via APB bus."]
35    #[inline(always)]
36    pub fn apb_mem_wr_err_ch0(&self) -> APB_MEM_WR_ERR_CH0_R {
37        APB_MEM_WR_ERR_CH0_R::new(((self.bits >> 26) & 1) != 0)
38    }
39}
40#[cfg(feature = "impl-register-debug")]
41impl core::fmt::Debug for R {
42    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
43        f.debug_struct("TX_CHSTATUS")
44            .field(
45                "mem_raddr_ex_ch0",
46                &format_args!("{}", self.mem_raddr_ex_ch0().bits()),
47            )
48            .field(
49                "apb_mem_waddr_ch0",
50                &format_args!("{}", self.apb_mem_waddr_ch0().bits()),
51            )
52            .field("state_ch0", &format_args!("{}", self.state_ch0().bits()))
53            .field(
54                "mem_empty_ch0",
55                &format_args!("{}", self.mem_empty_ch0().bit()),
56            )
57            .field(
58                "apb_mem_wr_err_ch0",
59                &format_args!("{}", self.apb_mem_wr_err_ch0().bit()),
60            )
61            .finish()
62    }
63}
64#[cfg(feature = "impl-register-debug")]
65impl core::fmt::Debug for crate::generic::Reg<TX_CHSTATUS_SPEC> {
66    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
67        core::fmt::Debug::fmt(&self.read(), f)
68    }
69}
70#[doc = "Channel %s status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_chstatus::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
71pub struct TX_CHSTATUS_SPEC;
72impl crate::RegisterSpec for TX_CHSTATUS_SPEC {
73    type Ux = u32;
74}
75#[doc = "`read()` method returns [`tx_chstatus::R`](R) reader structure"]
76impl crate::Readable for TX_CHSTATUS_SPEC {}
77#[doc = "`reset()` method sets TX_CH%sSTATUS to value 0"]
78impl crate::Resettable for TX_CHSTATUS_SPEC {
79    const RESET_VALUE: u32 = 0;
80}
esp32p4/rmt/tx_chstatus.rs

esp32p4/rmt/
tx_chstatus.rs
