esp32p4/mipi_csi_bridge/
frame_cfg.rs

1#[doc = "Register `FRAME_CFG` reader"]
2pub type R = crate::R<FRAME_CFG_SPEC>;
3#[doc = "Register `FRAME_CFG` writer"]
4pub type W = crate::W<FRAME_CFG_SPEC>;
5#[doc = "Field `VADR_NUM` reader - vadr of frame data."]
6pub type VADR_NUM_R = crate::FieldReader<u16>;
7#[doc = "Field `VADR_NUM` writer - vadr of frame data."]
8pub type VADR_NUM_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>;
9#[doc = "Field `HADR_NUM` reader - hadr of frame data."]
10pub type HADR_NUM_R = crate::FieldReader<u16>;
11#[doc = "Field `HADR_NUM` writer - hadr of frame data."]
12pub type HADR_NUM_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>;
13#[doc = "Field `HAS_HSYNC_E` reader - 0: frame data doesn't contain hsync. 1: frame data contains hsync."]
14pub type HAS_HSYNC_E_R = crate::BitReader;
15#[doc = "Field `HAS_HSYNC_E` writer - 0: frame data doesn't contain hsync. 1: frame data contains hsync."]
16pub type HAS_HSYNC_E_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `VADR_NUM_CHECK` reader - 0: disable vadr check. 1: enable vadr check."]
18pub type VADR_NUM_CHECK_R = crate::BitReader;
19#[doc = "Field `VADR_NUM_CHECK` writer - 0: disable vadr check. 1: enable vadr check."]
20pub type VADR_NUM_CHECK_W<'a, REG> = crate::BitWriter<'a, REG>;
21impl R {
22    #[doc = "Bits 0:11 - vadr of frame data."]
23    #[inline(always)]
24    pub fn vadr_num(&self) -> VADR_NUM_R {
25        VADR_NUM_R::new((self.bits & 0x0fff) as u16)
26    }
27    #[doc = "Bits 12:23 - hadr of frame data."]
28    #[inline(always)]
29    pub fn hadr_num(&self) -> HADR_NUM_R {
30        HADR_NUM_R::new(((self.bits >> 12) & 0x0fff) as u16)
31    }
32    #[doc = "Bit 24 - 0: frame data doesn't contain hsync. 1: frame data contains hsync."]
33    #[inline(always)]
34    pub fn has_hsync_e(&self) -> HAS_HSYNC_E_R {
35        HAS_HSYNC_E_R::new(((self.bits >> 24) & 1) != 0)
36    }
37    #[doc = "Bit 25 - 0: disable vadr check. 1: enable vadr check."]
38    #[inline(always)]
39    pub fn vadr_num_check(&self) -> VADR_NUM_CHECK_R {
40        VADR_NUM_CHECK_R::new(((self.bits >> 25) & 1) != 0)
41    }
42}
43#[cfg(feature = "impl-register-debug")]
44impl core::fmt::Debug for R {
45    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
46        f.debug_struct("FRAME_CFG")
47            .field("vadr_num", &format_args!("{}", self.vadr_num().bits()))
48            .field("hadr_num", &format_args!("{}", self.hadr_num().bits()))
49            .field("has_hsync_e", &format_args!("{}", self.has_hsync_e().bit()))
50            .field(
51                "vadr_num_check",
52                &format_args!("{}", self.vadr_num_check().bit()),
53            )
54            .finish()
55    }
56}
57#[cfg(feature = "impl-register-debug")]
58impl core::fmt::Debug for crate::generic::Reg<FRAME_CFG_SPEC> {
59    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
60        core::fmt::Debug::fmt(&self.read(), f)
61    }
62}
63impl W {
64    #[doc = "Bits 0:11 - vadr of frame data."]
65    #[inline(always)]
66    #[must_use]
67    pub fn vadr_num(&mut self) -> VADR_NUM_W<FRAME_CFG_SPEC> {
68        VADR_NUM_W::new(self, 0)
69    }
70    #[doc = "Bits 12:23 - hadr of frame data."]
71    #[inline(always)]
72    #[must_use]
73    pub fn hadr_num(&mut self) -> HADR_NUM_W<FRAME_CFG_SPEC> {
74        HADR_NUM_W::new(self, 12)
75    }
76    #[doc = "Bit 24 - 0: frame data doesn't contain hsync. 1: frame data contains hsync."]
77    #[inline(always)]
78    #[must_use]
79    pub fn has_hsync_e(&mut self) -> HAS_HSYNC_E_W<FRAME_CFG_SPEC> {
80        HAS_HSYNC_E_W::new(self, 24)
81    }
82    #[doc = "Bit 25 - 0: disable vadr check. 1: enable vadr check."]
83    #[inline(always)]
84    #[must_use]
85    pub fn vadr_num_check(&mut self) -> VADR_NUM_CHECK_W<FRAME_CFG_SPEC> {
86        VADR_NUM_CHECK_W::new(self, 25)
87    }
88}
89#[doc = "frame configuration.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`frame_cfg::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`frame_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
90pub struct FRAME_CFG_SPEC;
91impl crate::RegisterSpec for FRAME_CFG_SPEC {
92    type Ux = u32;
93}
94#[doc = "`read()` method returns [`frame_cfg::R`](R) reader structure"]
95impl crate::Readable for FRAME_CFG_SPEC {}
96#[doc = "`write(|w| ..)` method takes [`frame_cfg::W`](W) writer structure"]
97impl crate::Writable for FRAME_CFG_SPEC {
98    type Safety = crate::Unsafe;
99    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
100    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
101}
102#[doc = "`reset()` method sets FRAME_CFG to value 0x011e_01e0"]
103impl crate::Resettable for FRAME_CFG_SPEC {
104    const RESET_VALUE: u32 = 0x011e_01e0;
105}
esp32p4/mipi_csi_bridge/frame_cfg.rs

esp32p4/mipi_csi_bridge/
frame_cfg.rs
