esp32p4/lp_timer/
int_ena.rs

1#[doc = "Register `INT_ENA` reader"]
2pub type R = crate::R<INT_ENA_SPEC>;
3#[doc = "Register `INT_ENA` writer"]
4pub type W = crate::W<INT_ENA_SPEC>;
5#[doc = "Field `OVERFLOW` reader - need_des"]
6pub type OVERFLOW_R = crate::BitReader;
7#[doc = "Field `OVERFLOW` writer - need_des"]
8pub type OVERFLOW_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `SOC_WAKEUP` reader - need_des"]
10pub type SOC_WAKEUP_R = crate::BitReader;
11#[doc = "Field `SOC_WAKEUP` writer - need_des"]
12pub type SOC_WAKEUP_W<'a, REG> = crate::BitWriter<'a, REG>;
13impl R {
14    #[doc = "Bit 30 - need_des"]
15    #[inline(always)]
16    pub fn overflow(&self) -> OVERFLOW_R {
17        OVERFLOW_R::new(((self.bits >> 30) & 1) != 0)
18    }
19    #[doc = "Bit 31 - need_des"]
20    #[inline(always)]
21    pub fn soc_wakeup(&self) -> SOC_WAKEUP_R {
22        SOC_WAKEUP_R::new(((self.bits >> 31) & 1) != 0)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("INT_ENA")
29            .field("overflow", &format_args!("{}", self.overflow().bit()))
30            .field("soc_wakeup", &format_args!("{}", self.soc_wakeup().bit()))
31            .finish()
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for crate::generic::Reg<INT_ENA_SPEC> {
36    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
37        core::fmt::Debug::fmt(&self.read(), f)
38    }
39}
40impl W {
41    #[doc = "Bit 30 - need_des"]
42    #[inline(always)]
43    #[must_use]
44    pub fn overflow(&mut self) -> OVERFLOW_W<INT_ENA_SPEC> {
45        OVERFLOW_W::new(self, 30)
46    }
47    #[doc = "Bit 31 - need_des"]
48    #[inline(always)]
49    #[must_use]
50    pub fn soc_wakeup(&mut self) -> SOC_WAKEUP_W<INT_ENA_SPEC> {
51        SOC_WAKEUP_W::new(self, 31)
52    }
53}
54#[doc = "need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`int_ena::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`int_ena::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
55pub struct INT_ENA_SPEC;
56impl crate::RegisterSpec for INT_ENA_SPEC {
57    type Ux = u32;
58}
59#[doc = "`read()` method returns [`int_ena::R`](R) reader structure"]
60impl crate::Readable for INT_ENA_SPEC {}
61#[doc = "`write(|w| ..)` method takes [`int_ena::W`](W) writer structure"]
62impl crate::Writable for INT_ENA_SPEC {
63    type Safety = crate::Unsafe;
64    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
65    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
66}
67#[doc = "`reset()` method sets INT_ENA to value 0"]
68impl crate::Resettable for INT_ENA_SPEC {
69    const RESET_VALUE: u32 = 0;
70}
esp32p4/lp_timer/int_ena.rs

esp32p4/lp_timer/
int_ena.rs
